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SN74TVC3010PWG4 Fiches technique(PDF) 7 Page - Texas Instruments |
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SN74TVC3010PWG4 Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 19 page SN74TVC3010 10-BIT VOLTAGE CLAMP SCDS088G – APRIL 1999 – REVISED AUGUST 2003 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION electrical characteristics The electrical characteristics of the NMOS transistors used in the TVC devices are illustrated by TI SPICE simulations. Figure 4 shows the test configuration for the TI SPICE simulations. The results, shown in Figures 5 and 6, show the current through a pass transistor versus the voltage at the source for different reference voltages. The plots of the dc characteristics clearly reveal that the device clamps at the desired reference voltage for the varying device environments. Figure 5 shows the V-I characteristics, with low reference voltages and a reference-transistor drain-supply voltage of 3.3 V. To further investigate the spread of the V-I characteristic curves, VREF was held at 2.5 V and IREF was increased by raising VDDREF (see Figure 6). The result was a tighter grouping of the V-I curves. VDPASS VREF RDREF GATE VBIAS VDDREF RDPASS VDDPASS VSPASS Figure 4. TI SPICE Simulation Schematic and Voltage-Node Names |
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