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CAT5269 Fiches technique(PDF) 3 Page - Catalyst Semiconductor

No de pièce CAT5269
Description  Dual Digitally Programmable Potentiometers (DPP™) with 256 Taps and 2-wire Interface
Download  16 Pages
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Fabricant  CATALYST [Catalyst Semiconductor]
Site Internet  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT5269 Fiches technique(HTML) 3 Page - Catalyst Semiconductor

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CAT5269
© Catalyst Semiconductor, Inc.
3
Doc. No. MD-2123 Rev. C
Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Ratings
Units
Temperature Under Bias
-55 to +125
ºC
Storage Temperature
-65 to +150
°C
Voltage on Any Pin with Respect to VSS
(1) (2)
-2.0 to +VCC + 2.0
V
VCC with Respect to Ground
-2.0 to +7.0
V
Package Power Dissipation Capability (TA = 25ºC)
1.0
W
Lead Soldering Temperature (10secs)
300
ºC
Wiper Current
±6
mA
RECOMMENDED OPERATING CONDITIONS
Parameters
Ratings
Units
VCC
+2.5 to +6
V
Industrial Temperature
-40 to +85
°C
POTENTIOMETER CHARACTERISTICS
(Over recommended operating conditions unless otherwise stated.)
Limits
Symbol
Parameter
Test Conditions
Min
Typ.
Max
Units
RPOT
Potentiometer Resistance (100kΩ)
100
kΩ
RPOT
Potentiometer Resistance (50kΩ)
50
kΩ
Potentiometer Resistance
Tolerance
±20
%
RPOT Matching
1
%
Power Rating
25°C, each pot
50
mW
IW
Wiper Current
±3
mA
RW
Wiper Resistance
IW = ±3mA @ VCC = 3V
200
300
RW
Wiper Resistance
IW = ±3mA @ VCC = 5V
100
150
VTERM
Voltage on any RH or RL Pin
VSS = 0V
VSS
VCC
V
VN
Noise
(4)
nV
Hz
Resolution
0.4
%
Absolute Linearity
(5)
Rw(n)(actual)-R(n)(expected)
(8)
±1
LSB
(7)
Relative Linearity
(6)
Rw(n+1)-[Rw(n)+LSB]
(8)
±0.2
LSB
(7)
TCRPOT
Temperature Coefficient of RPOT
(4)
±300
ppm/ºC
TCRATIO
Ratiometric Temp. Coefficient
(4)
20
ppm/ºC
CH/CL/CW Potentiometer Capacitances
(4)
10/10/25
pF
fc
Frequency Response
RPOT = 50kΩ
(4)
0.4
MHz
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20ns.
(3) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
(6) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentio-
meter. It is a measure of the error in step size.
(7) LSB = RTOT / 255 or (RH - RL) / 255, single pot
(8) n = 0, 1, 2, ..., 255


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