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ST72324BJ Fiches technique(PDF) 80 Page - STMicroelectronics |
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ST72324BJ Fiches technique(HTML) 80 Page - STMicroelectronics |
80 / 188 page On-chip peripherals ST72324B 80/188 The OC1R register value required for a specific timing application can be calculated using the following formula: Where: t = Pulse period (in seconds) fCPU = CPU clock frequnency (in hertz) PRESC = Timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits; see Table 49) If the timer clock is an external clock the formula is: Where: t = Pulse period (in seconds) fEXT = External timer clock frequency (in hertz) When the value of the counter is equal to the value of the contents of the OC1R register, the OLVL1 bit is output on the OCMP1 pin (see Figure 47). Note: 1 The OCF1 bit cannot be set by hardware in one pulse mode but the OCF2 bit can generate an Output Compare interrupt. 2 When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the PWM mode is the only active one. 3 If OLVL1 = OLVL2 a continuous signal will be seen on the OCMP1 pin. 4 The ICAP1 pin can not be used to perform input capture. The ICAP2 pin can be used to perform input capture (ICF2 can be set and IC2R can be loaded) but the user must take care that the counter is reset each time a valid edge occurs on the ICAP1 pin and ICF1 can also generates interrupt if ICIE is set. 5 When one pulse mode is used OC1R is dedicated to this mode. Nevertheless OC2R and OCF2 can be used to indicate a period of time has been elapsed but cannot generate an output waveform because the level OLVL2 is dedicated to the one pulse mode. Figure 47. One Pulse mode timing example(1) 1. IEDG1 = 1, OC1R = 2ED0h, OLVL1 = 0, OLVL2 = 1 OCiR value = t * fCPU PRESC - 5 OCiR = t * fEXT - 5 Counter FFFC FFFD FFFE 2ED0 2ED1 2ED2 2ED3 FFFC FFFD OLVL2 OLVL2 OLVL1 ICAP1 OCMP1 Compare1 01F8 01F8 2ED3 IC1R |
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