SN74F193A

SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER

WITH DUAL CLOCK AND CLEAR

SDFS031A – D3693, JANUARY 1991 – REVISED OCTOBER 1993

2–4

POST OFFICE BOX 655303

typical clear, load, and count sequence

Illustrated below is the following sequence:

1.

Clear outputs to zero

2.

Load (preset) to binary thirteen

3.

Count up to fourteen, fifteen (carry), zero, one, and two

4.

Count down to one, zero (borrow), fifteen, fourteen, and thirteen

0

A

B

C

D

UP

DOWN

QA

QD

QC

QB

Count Up

Count Down

13

0

2

11

0

Data

Inputs

CLR

Outputs

LOAD

CO

BO

14

15

15

14

13

Sequence

Illustrated

Clear

Preset