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UPD12115 Fiches technique(PDF) 1 Page - NEC

No de pièce UPD12115
Description  MOS INTEGRATED CIRCUIT
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Fabricant  NEC [NEC]
Site Internet  http://www.nec.com/
Logo NEC - NEC

UPD12115 Fiches technique(HTML) 1 Page - NEC

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The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
2007
MOS INTEGRATED CIRCUIT
μ PD12115
1.5 V/1.0 A GENERAL-PURPOSE
CMOS REGULATOR
DATA SHEET
Document No. G18851EJ1V0DS00 (1st edition)
Date Published July 2007 NS
Printed in Japan
DESCRIPTION
μ PD12115 is a general-purpose CMOS regulator which has 1.5 V output voltage and 1.0 A output current capacity.
This product is suitable for low power-supply-voltage LSI etc. By ON/OFF function, the power consumption can be
kept low level at the time of off-state.
FEATURES
• Output Current: 1.0 A
• Output Voltage: 1.5 V (Fixed type)
• Output Voltage Tolerance: VO ± 2.0% (TJ = 25°C)
• Dropout Voltage: VDIF = 1.0 V MAX. (IO = 1.0 A)
• Quiescent Current: 150
μ A TYP. (IO = 0 A)
• Standby Current: 1
μ A
• Available for laminated ceramic capacitor: (Electric capacity 10
μ F or higher)
• On-chip over-current protection circuit
• On-chip thermal shut down circuit
APPLICATIONS
This regulator is suitable for low power-supply-voltage LSI which is used in digital appliances etc.
BLOCK DIAGRAM
+
VIN
GND
ON/OFF
ON/OFF
VOUT
+
Buffer
Reference
voltage
Constant
Current
Error
amp.
Triming
Thermal
shut down
Over-current
protection
PIN CONFIGURATION (Marking Side)
5-PIN TO-252 (5-PIN MP-3ZK)
123 4 5
6
Note No.3 pin is cut and can not be connected
to substrate. No.6 is Fin and common to
GND pin.
1. INPUT
2. ON/OFF
3. GND
Note
4. NC
5. OUTPUT
6. GND (Fin)


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