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AM29243EH Fiches technique(PDF) 1 Page - Advanced Micro Devices |
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AM29243EH Fiches technique(HTML) 1 Page - Advanced Micro Devices |
1 / 36 page This document contains information on a product under development at Advanced Micro Devices, Inc. The information is intended to help you evaluate this product. AMD ® reserves the right to change or discontinue work on this proposed product without notice. Publication #: 20068 Rev. A Amendment: /0 Issue Date: May 1997 Am29240 EH, Am29245 EH, and Am29243 EH Enhanced High-Performance RISC Microcontrollers 5/2/97 ™ ™ ™ PRELIMINARY DISTINCTIVE CHARACTERISTICS All three microcontrollers in the Am29240 ™EH micro- controller series have the following characteristics: Completely integrated system for embedded applications Full 32-bit architecture 4-Kbyte, two-way set-associative instruction cache 4-Gbyte virtual address space, 304-Mbyte physical space implemented Glueless system interfaces with on-chip wait state control 36 VAX MIPS (million instructions per second) sustained at 25 MHz Four banks of ROM, each separately programmable for 8-, 16-, or 32-bit interface Four banks of DRAM Single-cycle ROM burst-mode and DRAM page-mode access DRAM timing is software-programmable for 3/1 or 2/1 initial/burst access cycles 6-port peripheral interface adapter 16-line programmable I/O port Bidirectional parallel port controller Interrupt controller Fully pipelined integer unit Three-address instruction architecture 192 general purpose registers Traceable Cache ™ technology instruction and data cache tracing IEEE Std 1149.1-1990 (JTAG) compliant Standard Test Access Port and Boundary Scan Architecture Binary compatibility with all 29K ™ family microprocessors and microcontrollers CMOS technology/TTL compatible 208-pin Plastic Quad Flat Pack (PQFP) package 3.3-V power supply with 5-V-tolerant I/O Am29240EH Microcontroller The Am29240EH microcontroller has the following addi- tional features: 2-Kbyte, two-way set-associative data cache Single-cycle 32-bit multiplier for faster integer math; two-cycle Multiply Accumulate (MAC) function 16-entry on-chip Memory Management Unit (MMU) with one Translation Look-Aside Buffer 4-channel double-buffered DMA controller with queued reload Two serial ports (UARTs) Bidirectional bit serializer/deserializer 20- and 25-MHz operating frequencies Am29243EH Microcontroller The Am29243 ™EH data microcontroller is similar to the Am29240EH microcontroller, without the video inter- face. It includes the following features: 2-Kbyte, two-way set-associative data cache Single-cycle 32-bit multiplier for faster integer math; two-cycle MAC 32-entry on-chip MMU with dual TLBs 4-channel, double-buffered DMA controller with queued reload Two serial ports (UARTs) 20- and 25-MHz operating frequencies DRAM parity Am29245EH Microcontroller The low-cost Am29245 ™EH microcontroller is similar to the Am29240EH microcontroller, without the data cache and 32-bit multiplier. It includes the following features: 16-entry on-chip MMU with one TLB Two-channel DMA controller One serial port (UART) Bidirectional bit serializer/deserializer 16-MHz operating frequency |
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