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TDA8718 Fiches technique(PDF) 6 Page - NXP Semiconductors |
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TDA8718 Fiches technique(HTML) 6 Page - NXP Semiconductors |
6 / 16 page June 1994 6 Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8718 CHARACTERISTICS VEEA = −4.2 to −4.8 V; VEED = −4.2 to −4.8 V; VEEA to VEED = −0.1 to +0.1 V; AGND and DGND shorted together; Tamb = 0 to +70 °C; typical values measured at VEEA = −4.5 V, VEED = −4.5 V and Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VEEA analog supply voltage (pin 28) −4.2 −4.5 −4.8 V VEED digital supply voltage (pin 23) −4.2 −4.5 −4.8 V IEEA analog supply current (pin 28) 30 42 54 mA IEED digital supply current (pin 23) 100 120 150 mA IEEO(L) LOW level output supply current RL = 50 Ω 40 70 90 mA IEEO(H) HIGH level output supply current RL = 50 Ω 155 170 185 mA Reference voltages for the resistor ladder (see Table 1) IRT reference current (pin 5) R = 48 Ω 30 45 60 mA VRB reference voltage BOTTOM (pin 1) − 48 Ω× IRT − V VRT reference voltage TOP (pin 5) − 0 − V RLAD resistor ladder − 48 −Ω TCRLAD temperature coefficient of the resistor ladder − 175 − M Ω/K VosB voltage offset BOTTOM note 1 − 8 Ω× IRT − mV VosT voltage offset TOP note 1 − 8 Ω× IRT − mV Inputs CLK INPUT (PIN 8); CLK INPUT (PIN 9) VIL LOW level input voltage −−1.8 − V VIH HIGH level input voltage −−0.8 − V IIL LOW level input current Vclk = −1.8 V − 0 −µA IIH HIGH level input current Vclk = −0.8 V − 120 −µA RI input resistance fclk = 100 MHz − 1.5 − k Ω CI input capacitance fclk = 100 MHz − 3.5 − pF ∆Vclk(p-p) clock input voltage difference between CLK and CLK pin 8 to pin 9 (peak-to-peak value) − 900 − mV ANALOG INPUT (PIN 3); NOTE 2 IIL LOW level input current data output = 00 20 40 80 µA IIH HIGH level input current data output = FF 100 200 400 µA RI input resistance − 10 − k Ω CI input capacitance − 5 − pF |
Numéro de pièce similaire - TDA8718 |
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Description similaire - TDA8718 |
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