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TDA8004 Fiches technique(PDF) 8 Page - NXP Semiconductors

No de pièce TDA8004
Description  IC card interface
Download  22 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8004 Fiches technique(HTML) 8 Page - NXP Semiconductors

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2004 May 10
8
Philips Semiconductors
Product specification
IC card interface
TDA8004AT
I/O circuitry
The three data lines I/O, AUX1 and AUX2 are identical.
The Idle state is realized by data lines I/O and I/OUC being
pulled HIGH via a 10 k
Ω resistor (I/O to VCC and I/OUC to
VDD).
I/O is referenced to VCC, and I/OUC to VDD, thus allowing
operation with VCC ≠ VDD.
The first line on which a falling edge occurs becomes the
master. An anti-latch circuit disables the detection of falling
edges on the other line, which then becomes the slave.
After a time delay td(edge) (approximately 200 ns), the
N transistor on the slave line is turned on, thus transmitting
the logic 0 present on the master line.
When the master line returns to logic 1, the P transistor on
the slave line is turned on during the time delay td(edge) and
then both lines return to their Idle states.
This active pull-up feature ensures fast LOW-to-HIGH
transitions; it is able to deliver more than 1 mA up to an
output voltage of 0.9VCC on a 80 pF load. At the end of the
active pull-up pulse, the output voltage only depends on
the internal pull-up resistor, and on the load current (see
Fig.4).
The maximum frequency on these lines is 1 MHz.
Inactive state
After power-on reset, the circuit enters the inactive state.
A minimum number of circuits are active while waiting for
the microcontroller to start a session.
• All card contacts are inactive (approximately 200 Ω
to GND)
• I/OUC, AUX1UC and AUX2UC are high impedance
(10 k
Ω pull-up resistor connected to VDD)
• Voltage generators are stopped
• XTAL oscillator is running
• Voltage supervisor is active.
Activation sequence
After power-on and, after the internal pulse width delay,
the microcontroller may check the presence of the card
with the signal OFF (OFF = HIGH while CMDVCC is HIGH
means that the card is present; OFF = LOW while
CMDVCC is HIGH means that no card is present).
If the card is in the reader (which is the case if PRES or
PRES is true), the microcontroller may start a card session
by pulling CMDVCC LOW.
The following sequence then occurs (see Fig.5):
• CMDVCC is pulled LOW (t0)
• The voltage doubler is started (t1 ~t0)
• VCC rises from 0 to 5 or 3V with a controlled slope
(t2 =t1 + 123T) (I/O, AUX1 and AUX2 follow VCC with a
slight delay); T is 64 times the period of the internal
oscillator, approximately 25
µs
• I/O, AUX1 and AUX2 are enabled (t3 =t1 + 4T)
• CLK is applied to the C3 contact (t4)
• RST is enabled (t5 =t1 + 7T).
The clock may be applied to the card in the following way:
Set RSTIN HIGH before setting CMDVCC LOW, and
reset it LOW between t3 and t5; CLK will start at this
moment. RST will remain LOW until t5, where RST is
enabled to be the copy of RSTIN. After t5, RSTIN has no
further action on CLK. This is to allow a precise count of
CLK pulses before toggling RST.
If this feature is not needed, then CMDVCC may be set
LOW with RSTIN LOW. In this case, CLK will start at t3,
and after t5, RSTIN may be set HIGH in order to get the
Answer To Request (ATR) from the card.
0
(2)
(1)
6
4
2
0
20
40
t (ns)
Vo
(V)
12
8
4
0
Io
(mA)
60
FCE661
Fig.4
I/O, AUX1 and AUX2 output voltage and
current as a function of time during a
LOW-to-HIGH transition.
(1) Current.
(2) Voltage.


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