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TPS74901RGWT Fiches technique(PDF) 11 Page - Texas Instruments |
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TPS74901RGWT Fiches technique(HTML) 11 Page - Texas Instruments |
11 / 27 page www.ti.com DROPOUT VOLTAGE Reference SimplifiedBlock Diagram V OUT OUT BIAS FB IN V IN V =3.3V 5% BIAS ± V =3.3V 5V V =1.5V I =1.5A Efficiency=45% IN OUT OUT ± C OUT PROGRAMMABLE SOFT-START Reference SimplifiedBlock Diagram V OUT OUT BIAS FB IN V =5V 5% BIAS ± V =1.8V V =1.5V I =1.5A Efficiency=83% IN OUT OUT C OUT t = SS (V xC ) REF SS I SS (1) t = SSCL (V xC ) OUT(NOM) OUT I CL(MIN) (2) TPS749xx SBVS082A – JUNE 2007 – REVISED JULY 2007 The TPS749xx offers very low dropout performance, making it well-suited for high-current low VIN/low VOUT applications. The low dropout of the TPS749xx allows the device to be used in place of a DC/DC converter and still achieve good efficiencies. This provides designers with the power architecture for their applications to achieve the smallest, simplest, and lowest cost solution. There are two different specifications for dropout voltage with the TPS749xx. The first specification (see Figure 26) is referred to as VIN Dropout and is used when an external bias voltage is applied to achieve low dropout. This specification assumes that VBIAS is at least 3.25V (1) above V OUT, which is the Figure 27. Typical Application of the TPS749xx case for VBIAS when powered by a 5.0V rail with 5% Without an Auxiliary Bias tolerance and with VOUT = 1.5V. If VBIAS is higher than VOUT + 3.25V, VIN dropout is less than specified(1). The TPS749xx features a programmable, monotonic, voltage-controlled soft-start that is set with an external capacitor (CSS). This feature is important for many applications because it eliminates power-up initialization problems when powering FPGAs, DSPs, or other processors. The controlled voltage ramp of the output also reduces peak inrush current during start-up, minimizing start-up transient events to the input power bus. To achieve a linear and monotonic soft-start, the TPS749xx error amplifier tracks the voltage ramp of the external soft-start capacitor until the voltage exceeds the internal reference. The soft-start ramp time is dependent on the soft-start charging current Figure 26. Typical Application of the TPS749xx (ISS), soft-start capacitance (CSS), and the internal Using an Auxiliary Bias Rail reference voltage (VREF), and can be calculated using Equation 1: The second specification (shown in Figure 27) is referred to as VBIAS Dropout and applied to applications where IN and BIAS are tied together. This option allows the device to be used in If large output capacitors are used, the device applications where an auxiliary bias voltage is not current limit (ICL) and the output capacitor may set available or low dropout is not required. Dropout is the start-up time. In this case, the start-up time is limited by BIAS in these applications because VBIAS given by Equation 2: provides the gate drive to the pass FET; therefore, VBIAS must be 3.25V (1) above V OUT. where: VOUT(NOM) is the nominal set output voltage, COUT is the output capacitance, and ICL(MIN) is the minimum current limit for the device. In applications where monotonic startup is required, the soft-start time given by Equation 1 should be set (1) 3.25V is a test condition of this device and can be adjusted by to be greater than Equation 2. referring to Figure 8. 11 Submit Documentation Feedback |
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