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TDA1305 Fiches technique(PDF) 2 Page - NXP Semiconductors |
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TDA1305 Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 20 page 1995 Dec 08 2 Philips Semiconductors Preliminary specification Stereo 1fs data input up-sampling filter with bitstream continuous dual DAC (BCC-DAC2) TDA1305T FEATURES • Easy application • 16fs Finite-duration Impulse-Response (FIR) filter incorporated • Selectable system clock (fsys) 256fs or 384fs • I2S-bus serial input format (at fsys = 256fs) or LSB fixed 16, 18 or 20 bits serial input mode (at fsys = 384fs) • Slave-mode clock system • Cascaded 4-stage digital filter incorporating 2-stage FIR filter, linear interpolator and sample-and-hold • Smoothed transitions before and after muting (soft mute) • Digital de-emphasis filter for three sampling rates of 32 kHz, 44.1 kHz and 48 kHz • 12 dB attenuation via the attenuation input control • Double speed mode • 2nd order noise shaper • 96 (fsys = 384fs) or 128 (fsys = 256fs) times oversampling in normal speed mode • 48 (fsys = 384fs) or 64 (fsys = 256fs) times oversampling in double speed mode • Bitstream continuous calibration concept • Small outline SO28 package • Voltage output 1.5 V (RMS) at line drive level • Low total harmonic distortion • No zero crossing distortion • Inherently monotonic • No analog post filtering required • Superior signal-to-noise ratio • Wide dynamic range (18-bit) • Single rail supply (3.4 to 5.5 V). GENERAL DESCRIPTION The TDA1305T is a new generation of filter-DAC which features a unique combination of bitstream and continuous calibration techniques. The converter functions as a bitstream converter for low signals while large signals are generated using the dynamic continuous calibration technique, thus resulting in low power consumption, small chip size and easy application. The TDA1305T is a dual CMOS DAC with up-sampling filter and noise shaper. The combination of high oversampling up to 16fs, 2nd order noise shaping and continuous calibration conversion ensures that only simple 1st order analog post filtering is required. The TDA1305T supports the I2S-bus data input mode with word lengths of up to 20 bits (at fsys = 256fs) and the LSB fixed serial data input format with word lengths of 16, 18 and 20 bits (at fsys = 384fs). Four cascaded FIR filters increase the oversampling rate to 16 times. A sample-and-hold function increases the oversampling rate to 96 times (fsys = 384fs) or 128 times (fsys = 256fs). A 2nd order noise shaper converts this oversampled data to a bitstream for the 5-bit DACs. The DACs are of the continuous calibration type and incorporate a special date coding. This ensures an extremely high signal-to-noise ratio, superior dynamic range and immunity to process variation and component ageing. Two on-board operational amplifiers convert the digital-to-analog current to an output voltage. Externally connected capacitors perform the required 1st order filtering so that no further post filtering is required. The unique combination of bitstream and continuous calibration techniques, together with a high degree of analog and digital integration, results in a single filter-DAC with 18-bit dynamic range, high linearity and simple low cost application. ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA1305T SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 |
Numéro de pièce similaire - TDA1305 |
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Description similaire - TDA1305 |
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