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TPS79633KTTTG3 Fiches technique(PDF) 8 Page - Texas Instruments

No de pièce TPS79633KTTTG3
Description  ULTRALOW-NOISE, HIGH PSRR, FAST, RF, 1A LOW-DROPOUT LINEAR REGULATORS
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS79633KTTTG3 Fiches technique(HTML) 8 Page - Texas Instruments

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APPLICATION INFORMATION
Board Layout Recommendation to Improve
GND
EN
NR
IN
OUT
V
IN
V
OUT
0.01
µF
TPS796xx
2.2
µF
1
µF
External Capacitor Requirements
Regulator Mounting
Programming the TPS79601 Adjustable LDO
V
OUT + VREF
1)
R1
R2
(1)
TPS796xx
SLVS351I – SEPTEMBER 2002 – REVISED MAY 2006
The
TPS796xx
family
of
low-dropout
(LDO)
For example, the TPS79630 exhibits 40
µV
RMS
of
regulators
has
been
optimized
for
use
in
output voltage noise using a 0.1
µF ceramic bypass
noise-sensitive
equipment.
The
device
features
capacitor and a 10
µF ceramic output capacitor. Note
extremely low dropout voltages, high PSRR, ultralow
that the output starts up slower as the bypass
output noise, low quiescent current (265
µA typically),
capacitance increases due to the RC time constant
and enable input to reduce supply currents to less
at the bypass pin that is created by the internal
than 1
µA when the regulator is turned off.
250k
Ω resistor and external capacitor.
A typical application circuit is shown in Figure 22.
PSRR and Noise Performance
To improve ac measurements like PSRR, output
noise, and transient response, it is recommended
that the board be designed with separate ground
planes for VIN and VOUT, with each ground plane
connected only at the ground pin of the device. In
Figure 22. Typical Application Circuit
addition, the ground connection for the bypass
capacitor should connect directly to the ground pin of
the device.
Although not required, it is good analog design
practice to place a 0.1
µF — 2.2µF capacitor near the
The tab of the SOT223-6 package is electrically
input of the regulator to counteract reactive input
connected to ground. For best thermal performance,
sources. A 2.2
µF or larger ceramic input bypass
the tab of the surface-mount version should be
capacitor, connected between IN and GND and
soldered directly to a circuit-board copper area.
located close to the TPS796xx, is required for
Increasing
the
copper
area
improves
heat
stability and improves transient response, noise
dissipation.
rejection, and ripple rejection. A higher-value input
capacitor may be necessary if large, fast-rise-time
Solder
pad
footprint
recommendations
for
the
load transients are anticipated and the device is
devices are presented in an application bulletin
located several inches from the power source.
Solder Pad Recommendations for Surface-Mount
Devices, literature number AB-132, available for
Like most low dropout regulators, the TPS796xx
download from the TI web site (www.ti.com).
requires an output capacitor connected between
OUT and GND to stabilize the internal control loop.
The minimum recommended capacitor is 1
µF. Any
Regulator
1
µF or larger ceramic capacitor is suitable.
The output voltage of the TPS79601 adjustable
The internal voltage reference is a key source of
regulator is programmed using an external resistor
noise in an LDO regulator. The TPS796xx has an
divider as shown in Figure 28. The output voltage is
NR pin which is connected to the voltage reference
calculated using Equation 1:
through a 250k
Ω internal resistor. The 250kΩ
internal resistor, in conjunction with an external
bypass capacitor connected to the NR pin, creates a
low-pass filter to reduce the voltage reference noise
where:
and, therefore, the noise at the regulator output. In
order for the regulator to operate properly, the
VREF = 1.2246V typ (the internal reference
current flow out of the NR pin must be at a minimum,
voltage)
because any leakage current creates an IR drop
Resistors
R1
and
R2
should
be
chosen
for
across the internal resistor, thus creating an output
approximately 40
µA divider current. Lower value
error. Therefore, the bypass capacitor must have
resistors
can
be
used
for
improved
noise
minimal leakage current. The bypass capacitor
performance, but the device wastes more power.
should be no more than 0.1
µF in order to ensure that
Higher values should be avoided, as leakage current
it is fully charged during the quickstart time provided
at FB increases the output voltage error.
by the internal switch shown in the functional block
diagram.
8
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