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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ST92124CR1T6 Fiches technique(PDF) 24 Page - STMicroelectronics |
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ST92124CR1T6 Fiches technique(HTML) 24 Page - STMicroelectronics |
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24 / 429 page  24/429 ST92F124/F150/F250 - GENERAL DESCRIPTION 1.4 I/O PORTS Port 0, Port 1 and Port 9[7:2] provide the external memory interface. All the ports of the device can be programmed as Input/Output or in Input mode, compatible with TTL or CMOS levels (except where Schmitt Trigger is present). Each bit can be programmed individually (Refer to the I/O ports chapter). Internal Weak Pull-up As shown in Table 3, not all input sections imple- ment a Weak Pull-up. This means that the pull-up must be connected externally when the pin is not used or programmed as bidirectional. TTL/CMOS Input For all those port bits where no input schmitt trig- ger is implemented, it is always possible to pro- gram the input level as TTL or CMOS compatible by programming the relevant PxC2.n control bit. Refer I/O Ports Chapter to the section titled “Input/ Output Bit Configuration”. Schmitt Trigger Input Two different kinds of Schmitt Trigger circuitries are implemented: Standard and High Hysteresis. Standard Schmitt Trigger is widely used (see Ta- ble 3), while the High Hysteresis Schmitt Trigger is present on ports P4[7:6] and P6[5:4]. All inputs which can be used for detecting interrupt events have been configured with a “Standard” Schmitt Trigger, apart from the NMI pin which im- plements the “High Hysteresis” version. In this way, all interrupt lines are guaranteed as “edge sensitive”. Push-Pull/OD Output The output buffer can be programmed as push- pull or open-drain: attention must be paid to the fact that the open-drain option corresponds only to a disabling of P-channel MOS transistor of the buffer itself: it is still present and physically con- nected to the pin. Consequently it is not possible to increase the output voltage on the pin over VDD+0.3 Volt, to avoid direct junction biasing. Pure Open-Drain Output The user can increase the voltage on an I/O pin over VDD+0.3 Volt where the P-channel MOS tran- sistor is physically absent: this is allowed on all “Pure Open Drain” pins. In this case, the push-pull option is not available and any weak pull-up must be implemented externally. Table 3. I/O Port Characteristics Legend: WPU = Weak Pull-Up, OD = Open Drain. Input Output Weak Pull-Up Reset State Port 0[7:0] TTL/CMOS Push-Pull/OD No Bidirectional Port 1[7:3] Port 1[2:0] TTL/CMOS TTL/CMOS Push-Pull/OD Push-Pull/OD Yes No Bidirectional WPU Bidirectional Port 2[1:0] Port 2[3:2] Port 2[5:4] Port 2[7:6] Schmitt trigger TTL/CMOS Schmitt trigger TTL/CMOS Push-Pull/OD Pure OD Push-Pull/OD Push-Pull/OD Yes No Yes Yes Input Input CMOS Input Input CMOS Port 3[2:0] 1) Port 3.3 Port 3[7:4] Schmitt trigger TTL/CMOS Schmitt trigger Push-Pull/OD Push-Pull/OD Push-Pull/OD Yes Yes Yes Input Input CMOS Input Port 4.0, Port 4.4 Port 4.1 Port 4.2, Port 4.5 Port 4.3 Port 4[7:6] Schmitt trigger Schmitt trigger TTL/CMOS Schmitt trigger High hysteresis Schmitt trigger Push-Pull/OD Push-Pull/OD Push-Pull/OD Push-Pull/OD Pure OD No Yes Yes Yes No Input Bidirectional WPU Input CMOS Input Input Port 5[2:0], Port 5[7:4] Port 5.3 Schmitt trigger TTL/CMOS Push-Pull/OD Push-Pull/OD No Yes Input Input CMOS Port 6[3:0] Port 6[5:4] Port 6[7:6] 1) Schmitt trigger High hysteresis Schmitt trigger Schmitt trigger Push-Pull/OD Push-Pull/OD Push-Pull/OD Yes Yes Yes Input Input Input Port 7[7:0] Schmitt trigger Push-Pull/OD Yes Input Port 8[1:0] Port 8[7:2] Schmitt trigger Schmitt trigger Push-Pull/OD Push-Pull/OD Yes Yes Input Bidirectional WPU Port 9[7:0] Schmitt trigger Push-Pull/OD Yes Bidirectional WPU 9 |
Numéro de pièce similaire - ST92124CR1T6 |
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Description similaire - ST92124CR1T6 |
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