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TLV320AIC3106 Fiches technique(PDF) 4 Page - Texas Instruments |
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TLV320AIC3106 Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 99 page www.ti.com PIN ASSIGNMENTS A 1 2 3 4 5 6 7 8 9 B C D E F G H J 48−leadQFNPackage-FutureProduct (Bottomview) 5x5mm80−BallBGA Package (BottomView) 48 1 12 13 24 25 36 37 (Nottoscale) TLV320AIC3106 SLAS509A – DECEMBER 2006 – REVISED APRIL 2007 Connect QFN thermal pad to DRVSS. The shaded balls on BGA package are not connected to the die, but are electrically connected to each other. TERMINAL FUNCTIONS TERMINAL DESCRIPTION BGA BALL QFN NAME A2 13 MICBIAS Microphone Bias Voltage Output A1 14 MIC3R MIC3 Input (Right or Multifunction) C2,D2 15 AVSS_ADC Analog ADC Ground Supply, 0 V B1,C1 16,17 DRVDD ADC Analog and Output Driver Voltage Supply, 2.7 V – 3.6 V D1 18 HPLOUT High-Power Output Driver (Left +) E1 19 HPLCOM High-Power Output Driver (Left – or Multifunctional) E2,F2 20,21 DRVSS Analog Output Driver Ground Supply, 0 V F1 22 HPRCOM High-Power Output Driver (Right – or Multifunctional) G1 23 HPROUT High-Power Output Driver (Right +) H1 24 DRVDD ADC Analog and Output Driver Voltage Supply, 2.7 V– 3.6 V J1 25 AVDD_DAC Analog DAC Voltage Supply, 2.7 V–3.6 V G2,H2 26 AVSS_DAC Analog DAC Ground Supply, 0 V J2 27 MONO_LOP Mono Line Output (+) J3 28 MONO_LOM Mono Line Output (–) J4 29 LEFT_LOP Left Line Output (+) J5 30 LEFT_LOM Left Line Output (–) J6 31 RIGHT_LOP Right Line Output (+) J7 32 RIGHT_LOM Right Line Output (–) H8 33 RESET Reset General-Purpose Input/Output #2 (Input/Output)/Digital Microphone Data Input/PLL Clock J8 34 GPIO2 Input/Audio Serial Data Bus Bit Clock Input/Output 4 Submit Documentation Feedback |
Numéro de pièce similaire - TLV320AIC3106 |
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Description similaire - TLV320AIC3106 |
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