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AM29BDS640G Fiches technique(PDF) 8 Page - Advanced Micro Devices |
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AM29BDS640G Fiches technique(HTML) 8 Page - Advanced Micro Devices |
8 / 77 page 6Am29BDS640G 25903C2 May 9, 2006 Data Sheet Product Selector Guide Notes: 1. Speed Options ending in “3” and “8” indicate the “reduced wait-state handshaking” option, which speeds initial synchronous accesses for even addresses. 2. Speed Options ending in “4” and “9” indicate the “standard handshaking” option. 3. See the AC Characteristics section of this datasheet for full specifications. Part Number Am29BDS640G Burst Frequency 54 MHz 40 MHz Speed Option VCC = 1.65 – 1.95 V, VIO = 2.7 – 3.15 V D3, D4 C3, C4 VCC, VIO = 1.65 – 1.95 V D8, D9 C8, C9 Max Initial Synchronous Access Time, ns (tIACC) Reduced Wait-state Handshaking: Even Address 87.5 95 Max Initial Synchronous Access Time, ns (tIACC) Reduced Wait-state Handshaking: Odd Address; or Standard Handshaking 106 120 Max Burst Access Time, ns (tBACC)13.5 20 Max Asynchronous Access Time, ns (tACC) 70 90 Max CE# Access, ns (tCE) Max OE# Access, ns (tOE)13.5 20 |
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