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MC74HC132A Fiches technique(PDF) 1 Page - ON Semiconductor

No de pièce MC74HC132A
Description  Quad 2−Input NAND Gate with Schmitt−Trigger Inputs High−Performance Silicon−Gate CMOS
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Site Internet  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 12
1
Publication Order Number:
MC74HC132A/D
MC74HC132A
Quad 2−Input NAND Gate
with Schmitt−Trigger Inputs
High−Performance Silicon−Gate CMOS
The MC74HC132A is identical in pinout to the LS132. The device
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
The HC132A can be used to enhance noise immunity or to square up
slowly changing waveforms.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements as Defined by JEDEC
Standard No. 7A
Chip Complexity: 72 FETs or 18 Equivalent Gates
Pb−Free Packages are Available
Figure 1. Pin Assignment
11
12
13
14
8
9
10
5
4
3
2
1
7
6
B3
Y4
A4
B4
VCC
Y3
A3
A2
Y1
B1
A1
GND
Y2
B2
MARKING
DIAGRAMS
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or
G = Pb−Free Package
PDIP−14
N SUFFIX
CASE 646
SOIC−14
D SUFFIX
CASE 751A
HC132AG
AWLYWW
TSSOP−14
DT SUFFIX
CASE 948G
HC
132A
ALYW
G
G
1
14
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
Inputs
Output
AB
Y
LL
H
LH
H
HLH
HH
L
FUNCTION TABLE
1
14
http://onsemi.com
MC74HC132AN
AWLYYWWG
1
14
(Note: Microdot may be in either location)
SOEIAJ−14
F SUFFIX
CASE 965
74HC132A
ALYWG
1
14


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