MJB44H11_05 datasheet(3/6 Pages) ONSEMI

No de pièce	MJB44H11

Description	Complementary Power Transistors D2PAK for Surface Mount

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Fabricant	ONSEMI [ON Semiconductor]

Site Internet	http://www.onsemi.com

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MJB44H11 (NPN), MJB45H11 (PNP)

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3

Figure 2. Maximum Rated Forward Bias

Safe Operating Area

100

1.0

VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)

5.0

10

TC ≤ 70° C

DUTY CYCLE ≤ 50%

2.0 3.0

20

30

50

100

1.0

7.0

70

1.0 ms

dc

0.1

0.2

0.3

0.5

2.0

3.0

5.0

10

20

30

50

10 ms

100 ms

1.0 ms

There are two limitations on the power handling ability of

a transistor: average junction temperature and second

breakdown. Safe operating area curves indicate IC − VCE

limits of the transistor that must be observed for reliable

operation; i.e., the transistor must not be subjected to greater

dissipation than the curves indicate.

The data of Figure 2 is based on TJ(pk) = 150°C; TC is

variable depending on conditions. Second breakdown pulse

limits are valid for duty cycles to 10% provided TJ(pk)

v 150°C. TJ(pk) may be calculated from the data in

Figure 1. At high case temperatures, thermal limitations will

reduce the power that can be handled to values less than the

limitations imposed by second breakdown.

Figure 3. Power Derating

0

T, TEMPERATURE (°C)

0

40

60

100

120

160

40

TC

20

60

0

2.0

TA

1.0

3.0

80

140

TC

TA

20

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