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74VCX16245 Fiches technique(PDF) 1 Page - ON Semiconductor

No de pièce 74VCX16245
Description  Low?뭋oltage 1.8/2.5/3.3V 16?묪it Transceiver
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

74VCX16245 Fiches technique(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 7
1
Publication Order Number:
74VCX16245/D
74VCX16245
Low−Voltage 1.8/2.5/3.3V
16−Bit Transceiver
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74VCX16245 is an advanced performance, non−inverting
16−bit transceiver. It is designed for very high−speed, very low−power
operation in 1.8 V, 2.5 V or 3.3 V systems.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.
The VCX16245 is designed with byte control. It can be operated as
two separate octals, or with the controls tied together, as a 16−bit wide
function. The Transmit/Receive (T/Rn) inputs determine the direction
of data flow through the bi−directional transceiver. Transmit
(active−HIGH) enables data from A ports to B ports; Receive
(active−LOW) enables data from B to A ports. The Output Enable
inputs (OEn), when HIGH, disable both A and B ports by placing them
in a HIGH Z condition.
Features
Designed for Low Voltage Operation: VCC = 1.65−3.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation: 2.5 ns max for 3.0 to 3.6 V
3.0 ns max for 2.3 to 2.7 V
6.0 ns max for 1.65 to 1.95 V
Static Drive: ±24 mA Drive at 3.0 V
±18 mA Drive at 2.3 V
±6 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds ±250 mA @ 125°C
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
TSSOP−48
DT SUFFIX
CASE 1201
1
48
VCX16245
AWLYYWW
48
Device
Package
Shipping
ORDERING INFORMATION
74VCX16245DT
TSSOP
39 / Rail
74VCX16245DTR
TSSOP
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
http://onsemi.com
1


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