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ST7FLITE02Y0B6 Fiches technique(PDF) 7 Page - STMicroelectronics |
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ST7FLITE02Y0B6 Fiches technique(HTML) 7 Page - STMicroelectronics |
7 / 125 page ST7LITE0x, ST7LITESx 7/125 PIN DESCRIPTION (Cont’d) Legend / Abbreviations for Table 1: Type: I = input, O = output, S = supply In/Output level: C= CMOS 0.15VDD/0.85VDD with input trigger CT= CMOS 0.3VDD/0.7VDD with input trigger Output level: HS = 20mA high sink (on N-buffer only) Port and control configuration: – Input: float = floating, wpu = weak pull-up, int = interrupt 1), ana = analog – Output: OD = open drain, PP = push-pull Table 1. Device Pin Description Pin n° Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output 1VSS S Ground 2VDD S Main power supply 3 RESET I/O CT X X Top priority non maskable interrupt (active low) 4 PB0/AIN0/SS I/O CT X ei3 X X X Port B0 ADC Analog Input 0 or SPI Slave Select (active low) Caution: No negative current in- jection allowed on this pin. For details, refer to section 13.2.2 on page 83 5 PB1/AIN1/SCK I/O CT X XX X X Port B1 ADC Analog Input 1 or SPI Clock Caution: No negative current in- jection allowed on this pin. For details, refer to section 13.2.2 on page 83 6 PB2/AIN2/MISO I/O CT X XX X X Port B2 ADC Analog Input 2 or SPI Mas- ter In/ Slave Out Data 7 PB3/AIN3/MOSI I/O CT X ei2 X X X Port B3 ADC Analog Input 3 or SPI Mas- ter Out / Slave In Data 8 PB4/AIN4/CLKIN I/O CT X XX X X Port B4 ADC Analog Input 4 or External clock input 9 PA7 I/O CT X ei1 X X Port A7 10 PA6 /MCO/ ICCCLK I/O CT X X XX Port A6 Main Clock Output/In Circuit Communication Clock. Caution: During normal opera- tion this pin must be pulled- up, internally or externally (external pull-up of 10k mandatory in noisy environment). This is to avoid en- tering ICC mode unexpectedly during a reset. In the application, even if the pin is configured as output, any reset will put it back in input pull-up 1 |
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