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TPS71818-28DRVT Fiches technique(PDF) 9 Page - Texas Instruments

No de pièce TPS71818-28DRVT
Description  Dual, 200mA Output, Low Noise, High PSRR Low-Dropout Linear Regulators in 2mm x 2mm SON Package
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

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APPLICATION INFORMATION
Board Layout Recommendations to Improve
Internal Current Limit
TPS718xx
TPS719xx
GND
EN1
EN2
OUT2
IN
OUT1
V
IN
V
OUT
V
OUT
1 F
m
1 F
m
1 F
m
2.7V
6.5V
-
0.9V
3.6V
-
0.9V
3.6V
-
On
Off
On
Off
Input and Output Capacitor Requirements
Shutdown
t=3
60
R
L
´
60+R
L
C
OUT
´
Dropout Voltage
TPS718xx
TPS719xx
SBVS088A – FEBRUARY 2007 – REVISED MARCH 2007
The TPS718xx/TPS719xx belong to a family of new
generation
LDO
regulators
that
use
innovative
PSRR and Noise Performance
circuitry to achieve ultra-wide bandwidth and high
loop gain, resulting in extremely high PSRR (up to
To improve ac performance such as PSRR, output
1MHz) at very low headroom (VIN – VOUT). These
noise, and transient response, it is recommended
features, combined with low noise, two independent
that the board be designed with separate ground
enables, low ground pin current and ultra-small
planes for VIN and VOUT, with each ground plane
packaging,
make
this
part
ideal
for
portable
connected only at the GND pin of the device. In
applications.
This
family
of
regulators
offer
addition, the ground connection for the output
sub-bandgap output voltages, current limit and
capacitor should connect directly to the GND pin of
thermal protection, and is fully specified from –40
°C
the device. High ESR capacitors may degrade
to +125
°C.
PSRR.
Figure 22 shows the basic circuit connections.
The TPS718xx/TPS719xx internal current limits help
protect the regulator during fault conditions. During
current limit, the output sources a fixed amount of
current that is largely independent of output voltage.
For reliable operation, the device should not be
operated in a current limit state for extended periods
of time.
The
PMOS
pass
element
in
the
TPS718xx/TPS719xx has a built-in body diode that
conducts current when the voltage at OUT exceeds
the voltage at IN. This current is not limited, so if
extended reverse voltage operation is anticipated,
Figure 22. Typical Application Circuit
external limiting to 5% of rated output current may be
appropriate.
Although an input capacitor is not required for
The enable pin (EN) is active high and is compatible
stability, it is good analog design practice to connect
with standard and low voltage, TTL-CMOS levels.
a 0.1
µF to 1.0µF low equivalent series resistance
When shutdown capability is not required, EN can be
(ESR) capacitor across the input supply near the
connected to IN. The TPS719 with internal active
regulator. This capacitor counteracts reactive input
output pulldown circuitry discharges the output with a
sources and improves transient response, noise
time constant (t) of:
rejection,
and
ripple
rejection.
A
higher-value
capacitor may be necessary if large, fast rise-time
load transients are anticipated or if the device is
located close to the power source. If source
impedance is not sufficiently low, a 0.1
µF input
capacitor may be necessary to ensure stability.
with:
• R
L = output load resistance
The TPS718xx/TPS719xx are designed to be stable
• C
OUT = Output capacitance
with standard ceramic capacitors of values 1.0
µF or
larger at the output. X5R- and X7R-type capacitors
are best because they have minimal variation in
value and ESR over temperature. Maximum ESR
The
TPS718xx/TPS719xx
use
a
PMOS
pass
should be <1.0
Ω.
transistor to achieve low dropout. When (VIN – VOUT)
is less than the dropout voltage (VDO), the PMOS
pass device is in its linear region of operation and
the input-to-output resistance is the RDS(ON) of the
PMOS pass element. VDO approximately scales with
output current because the PMOS device behaves
like a resistor in dropout.
9
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