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CS1088XN40 Fiches technique(PDF) 5 Page - ON Semiconductor

No de pièce CS1088XN40
Description  Vacuum Fluorescent Display Tube Driver
Download  8 Pages
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS1088XN40 Fiches technique(HTML) 5 Page - ON Semiconductor

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CS1088
http://onsemi.com
5
AN1 – AN23, AN30, AN31: 2.0 mA
VREG
POR
GRID1
GRID2 GRID3
AN1
AN2
AN3
AN25
AN26
AN27
AN28
AN29
AN30
AN31
VBB
GND
GREN
STB
DIN
CLK
METAL MASK ROM
Output Drive Capability
Grid Outputs: 50 mA
AN24 – AN29: 20 mA
DQ
LE
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
VREG
VREG
VREG
VREG
VREG
Figure 2. Block Diagram
OPERATION DESCRIPTION
Upon the initial application of power, the power on reset
function will cause all of the anode and grid driver outputs
to be off and all shift register outputs to be set low. Data is
fed into the shift register through the DIN pin at the rising
edge of the CLK input. Thirty four bits of data are capable
of being stored by the shift register. Once the desired pattern
is stored in the shift register, it can be transferred to the latch
by setting the STB input high. The output of each latch
drives its corresponding output stage. A logic high input to
the shift register/latch will cause the corresponding output
to turn on. A logic low input to the shift register/latch will
cause the corresponding output to turn off. Please note that
if the STB is held high, the outputs of the latch reflect the
outputs of the corresponding shift register bits and will
change if data is shifted in.
The three GRID outputs are gated by the GREN input.
When GREN is low, the GRID outputs are forced low
regardless of the state of the corresponding latch output.
When GREN is high, the GRID outputs correspond to the
state of their respective latch outputs. The anode outputs,
AN1 to AN31 are always enabled.


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