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AD9981KSTZ-95 Fiches technique(PDF) 10 Page - Analog Devices |
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AD9981KSTZ-95 Fiches technique(HTML) 10 Page - Analog Devices |
10 / 44 page AD9981 Rev. 0 | Page 10 of 44 Pin Description POWER SUPPLY VD (3.3 V) Main Power Supply. These pins supply power to the main elements of the circuit. They should be as quiet and filtered as possible. VDD (1.8 V–3.3 V) Digital Output Power Supply. A large number of output pins (up to 35) switching at high speed (up to 95 MHz) generate a lot of power supply transients (noise). These supply pins are identified separately from the VD pins, so special care can be taken to minimize output noise transferred into the sensitive analog circuitry. If the AD9981 is interfacing with lower voltage logic, VDD may be connected to a lower supply voltage (as low as 1.8 V) for compatibility. PVD (1.8 V) Clock Generator Power Supply. The most sensitive portion of the AD9981 is the clock generation circuitry. These pins provide power to the clock PLL and help the user design for optimal performance. The designer should provide quiet, noise-free power to these pins. DAVDD (1.8 V) Digital Input Power Supply. This supplies power to the digital logic. GND Ground. The ground return for all circuitry on-chip. It is recommended that the AD9981 be assembled on a single solid ground plane, with careful attention to ground current paths. |
Numéro de pièce similaire - AD9981KSTZ-95 |
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Description similaire - AD9981KSTZ-95 |
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