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AD8333ACPZ-REEL Fiches technique(PDF) 2 Page - Analog Devices |
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AD8333ACPZ-REEL Fiches technique(HTML) 2 Page - Analog Devices |
2 / 28 page AD8333 Rev. A | Page 2 of 28 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Equivalent Input Circuits ................................................................ 7 Typical Performance Characteristics ............................................. 8 Test Circuits..................................................................................... 14 Theory of Operation ...................................................................... 17 Quadrature Generation ............................................................. 17 I/Q Demodulator and Phase Shifter ........................................ 17 Dynamic Range and Noise........................................................ 18 Summation of Multiple Channels (Analog Beamforming).. 19 Phase Compensation and Analog Beamforming................... 19 Channel Summing ..................................................................... 20 Dynamic Range Inflation .......................................................... 22 Disabling the Current Mirror and Decreasing Noise............ 22 Applications..................................................................................... 24 Logic Inputs and Interfaces....................................................... 24 Reset Input .................................................................................. 24 Connecting to the LNA of the AD8331/ AD8332/AD8334/AD8335 VGAs............................................ 24 LO Input ...................................................................................... 25 Evaluation Board ........................................................................ 25 Outline Dimensions ....................................................................... 27 Ordering Guide .......................................................................... 27 REVISION HISTORY 5/06—Rev. 0 to Rev. A Changes to Figure 62...................................................................... 26 10/05—Revision 0: Initial Version |
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