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AD8128ACPZ-R2 Fiches technique(PDF) 10 Page - Analog Devices |
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AD8128ACPZ-R2 Fiches technique(HTML) 10 Page - Analog Devices |
10 / 12 page AD8128 Rev. 0 | Page 10 of 12 APPLICATIONS KVM APPLICATIONS In KVM applications, cable equalization typically occurs at the root of the KVM network. In a star configuration, a driver is located at each of the end nodes and a receiver/equalizer is located at the single root node. In a daisy-chain configuration, each of the end nodes are connected to one another, and one of them is connected to the root. Similarly, the drivers are placed on the nodes, and the receivers/equalizers are placed at the root. In both of these aforementioned configurations, three AD8128 receiver/equalizers can be used at the root node to equalize the transmitted red (R), green (G), and blue (B) channels for up to 100 meters of cable. Since the skew between two pairs of cables in CAT-5 is less than 1%, the control pins can be tied together and used as a single set of controls. If the common-mode levels of the inputs permit using the AD8128 as a receiver (see the Input Common-Mode Voltage Range Considerations section), the input signal should be terminated by a 100 Ω shunt resistor between the pairs, or by two 50 Ω shunt resistors with a common-mode tap in the middle. This CM tap can be used to extract the sync information from the signal if sync-on-common-mode is used. VOFFSET VGAIN VPEAK VOUT VIN+ VIN– AD8128 HPF HPF LPF VCM 50Ω 50Ω VCM VDIFF VCM VDIFF CAT-5 Figure 18. Single Receiver Configuration for CAT-5 Equalizer DC CONTROL PINS The AD8128 uses two control pins (VGAIN and VPEAK) to adjust the equalization based on the length of the cable and one pin (VOFFSET) to adjust the dc output offset. VGAIN is a user-adjustable 0 V to 1 V broadband gain control pin, and VPEAK is a 0 V to 1 V adjustable high frequency gain pin to equalize for the skin effect in CAT-5 cable. The values of both VPEAK and VGAIN are linearly correlated to the length of the cable to be equalized. A simple formula can be used to approximate the desired values for both of these pins. 425m/V ) (m length V GAIN = (3) 110m/V ) (m length V PEAK = (4) While these equations give a close approximation of the desired value for each pin, to achieve optimal performance, it may be necessary to adjust these values slightly. Figure 19 and Figure 20 illustrate circuits used to adjust the control pins on the AD8128. In Figure 19, a 1 kΩ potentiometer is used to adjust the control pin voltage between the specified range of 0 V to 1 V. In Figure 20, a 2 kΩ potentiometer is used to control the offset pin from −2.5 V to +2.5 V. For both of these configurations, a ±5V supply is assumed. CONTROL PIN VGAIN OR VPEAK 0.01µF +5V 4kΩ 1kΩ Figure 19. Circuit to Control VGAIN and VPEAK (0 V to 1 V) OFFSET 0.01µF +5V –5V 1kΩ 1kΩ 2kΩ Figure 20. Circuit to Control VOFFSET (±2.5 V) |
Numéro de pièce similaire - AD8128ACPZ-R2 |
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Description similaire - AD8128ACPZ-R2 |
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