AD7829-1

Rev. 0 | Page 7 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DB3

28

DB4

27

DB5

26

DB6

25

DB7

24

AGND

23

22

21

20

19

18

17

16

15

AD7829-1

TOP VIEW

(Not to Scale)

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

12 to 19

Analog Input Channels. The AD7829-1 has eight analog input channels. The inputs have an input span of 2.5 V

22

Positive Supply Voltage, 3 V ± 10% and 5 V ± 10%.

23

AGND

Analog Ground. Ground reference for track/hold, comparators, reference circuit, and multiplexer.

7

DGND

Digital Ground. Ground reference for digital circuitry.

4

CONVST

Logic Input Signal. The convert start signal initiates an 8-bit analog-to-digital conversion on the falling edge

of this signal. The falling edge of this signal places the track/hold in hold mode. The track/hold goes into track

mode again 120 ns after the start of a conversion. The state of the CONVST signal is checked at the end of a

conversion. If it is logic low, the AD7829-1 powers down (see the Operating Modes section).

8

EOC

Logic Output. The end of conversion signal indicates when a conversion has finished. The signal can be used

to interrupt a microcontroller when a conversion has finished or latch data into a gate array (see the Parallel

Interface section).

5

CS

Logic Input Signal. The chip select signal is used to enable the parallel port of the AD7829. This is necessary

if the ADC is sharing a common data bus with another device.

6

RD

Logic Input Signal. The read signal is used to take the output buffers out of their high impedance state and drive

data onto the data bus. The signal is internally gated with the CS signal. Both RD and CS must be logic low to

enable the data bus.

9 to 11

A2 to A0

Channel Address Inputs. The address of the next multiplexer channel must be present on these inputs when

the RD signal goes low.

1 to 3,

24 to 28

DB2 to DB0,

DB7 to DB3

Data Output Lines. They are normally held in a high impedance state. Data is driven onto the data bus when

both RD and CS go active low.

21

Analog Input and Output. An external reference can be connected to the AD7829-1 at this pin. The on-chip

reference is also available at this pin. When using the internal reference, this pin can be left unconnected or,

in some cases, it can be decoupled to AGND with a 0.1 μF capacitor.

20

(see the Analog Input section).