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EMD4DXV6T1 Fiches technique(PDF) 1 Page - ON Semiconductor |
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EMD4DXV6T1 Fiches technique(HTML) 1 Page - ON Semiconductor |
1 / 5 page © Semiconductor Components Industries, LLC, 2005 October, 2005− Rev. 1 1 Publication Order Number: EMD4DXV6/D EMD4DXV6T1, EMD4DXV6T5 Preferred Devices Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the EMD4DXV6T1 series, two complementary BRT devices are housed in the SOT−563 package which is ideal for low power surface mount applications where board space is at a premium. Features • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • These are Pb−Free Devices MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted) Rating Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Symbol Max Unit Total Device Dissipation TA = 25°C (Note 1) Derate above 25 °C (Note 1) PD 357 2.9 mW mW/ °C Thermal Resistance, Junction-to-Ambient (Note 1) RqJA 350 °C/W Total Device Dissipation TA = 25°C (Note 1) Derate above 25 °C PD 500 4.0 mW mW/ °C Thermal Resistance, Junction-to-Ambient (Note 1) RqJA 250 °C/W Junction and Storage Temperature TJ, Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−4 board with minimum mounting pad. Preferred devices are recommended choices for future use and best overall value. Q1 R1 R2 R2 R1 Q2 (1) (2) (3) (4) (5) (6) http://onsemi.com SOT−563 CASE 463A STYLE 1 U7 = Specific Device Code M = Date Code G = Pb−Free Package MARKING DIAGRAM Device Package Shipping† ORDERING INFORMATION †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. EMD4DXV6T5G SOT−563 (Pb−Free) 8000/Tape & Reel EMD4DXV6T1G SOT−563 (Pb−Free) 4000/Tape & Reel (Note: Microdot may be in either location) U7 M G G 1 1 6 |
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