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AD5062BRJ-2 Fiches technique(PDF) 6 Page - Analog Devices

No de pièce AD5062BRJ-2
Description  Full Accurate 16 Bit Vout nanoDac, 2.7V- 5.5V, in a Sot 23
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5062BRJ-2 Fiches technique(HTML) 6 Page - Analog Devices

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AD5062/AD5063
Preliminary Technical Data
Rev. Pr B | Page 6 of 17
PIN CONFIGURATION AND FUNCTION
DESCRIPTION
Figure 2. AD5062 8ld Sot23
Figure 3. AD5063 10 ld uSOIC.
Table 2. Pin Function Descriptions
Mnemonic
Function
VDD
Power Supply Input. These parts can be operated from +2.5 V to +5.5 V and VDD should be decoupled to GND.
REF
Reference Voltage Input.
DacGND
Ground input to the DAC.
VOUT
Analog output voltage from DAC.
SYNC
Level triggered control input (active low). This is the frame synchronization signal for the input data. When
SYNC goes low,
it enables the input shift register and data is transferred in on the falling edges of the following clocks. The DAC is updated
following the 16th clock cycle unless
SYNC is taken high before this edge in which case the rising edge of SYNC acts as an
interrupt and the write sequence is ignored by the DAC.
SCLK
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be
transferred at rates up to 30 MHz.
DIN
Serial Data Input. This device has a 24 bit shift register. Data is clocked into the register on the falling edge of the serial clock
input.
AGND
Ground reference point for Analog circuitry on the part.
RFB
Feedback Resistor. In bipolar mode connect this pin to external op amp circuit.
INV
Connected to the internal Scaling resistors of the DAC. Connect INV pin to external op-amps inverting input in bipolar mode.


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