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ADV7391EBZ Fiches technique(PDF) 7 Page - Analog Devices

No de pièce ADV7391EBZ
Description  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
Download  96 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADV7391EBZ Fiches technique(HTML) 7 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 7 of 96
DIGITAL TIMING SPECIFICATIONS
VDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, VAA = 2.6 V to 3.465 V, VDD_IO = 2.97 V to 3.63 V.
All specifications TMIN to TMAX (−40°C to +85°C), unless otherwise noted.
Table 7.
Parameter
Conditions1
Min
Typ
Max
Unit
VIDEO DATA AND VIDEO CONTROL PORT2, 3
Data Input Setup Time, t114
SD
2.1
ns
ED/HD-SDR
2.3
ns
ED/HD-DDR
2.3
ns
ED (at 54 MHz)
1.7
ns
Data Input Hold Time, t124
SD
1.0
ns
ED/HD-SDR
1.1
ns
ED/HD-DDR
1.1
ns
ED (at 54 MHz)
1.0
ns
Control Input Setup Time, t114
SD
2.1
ns
ED/HD-SDR or ED/HD-DDR
2.3
ns
ED (at 54 MHz)
1.7
ns
Control Input Hold Time, t124
SD
1.0
ns
ED/HD-SDR or ED/HD-DDR
1.1
ns
ED (at 54 MHz)
1.0
ns
Control Output Access Time, t134
SD
12
ns
ED/HD-SDR, ED/HD-DDR, or ED (at 54 MHz)
10
ns
Control Output Hold Time, t144
SD
4.0
ns
ED/HD-SDR, ED/HD-DDR, or ED (at 54 MHz)
3.5
ns
PIPELINE DELAY5
SD1
CVBS/YC Outputs (2×)
SD oversampling disabled
68
clock cycles
CVBS/YC Outputs (8×)
SD oversampling disabled
79
clock cycles
CVBS/YC Outputs (16×)
SD oversampling enabled
67
clock cycles
Component Outputs (2×)
SD oversampling disabled
78
clock cycles
Component Outputs (8×)
SD oversampling disabled
69
clock cycles
Component Outputs (16×)
SD oversampling enabled
84
clock cycles
ED1
Component Outputs (1×)
ED oversampling disabled
41
clock cycles
Component Outputs (4×)
ED oversampling disabled
49
clock cycles
Component Outputs (8×)
ED oversampling enabled
46
clock cycles
HD1
Component Outputs (1×)
HD oversampling disabled
40
clock cycles
Component Outputs (2×)
HD oversampling disabled
42
clock cycles
Component Outputs (4×)
HD oversampling enabled
44
clock cycles
RESET CONTROL
RESET Low Time
100
ns
1 SD = standard definition, ED = enhanced definition (525p/625p), HD = high definition, SDR = single data rate, DDR = dual data rate.
2 Video Data: P[15:0] for ADV7392/ADV7393 or P[7:0] for ADV7390/ADV7391.
3 Video Control: HSYNC and VSYNC.
4 Guaranteed by characterization.
5 Guaranteed by design.


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