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AM29LV640MH90REI Fiches technique(PDF) 6 Page - SPANSION

No de pièce AM29LV640MH90REI
Description  64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
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Am29LV640MH/L
December 14, 2005
DA TA SH EET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations .....................................................10
Word/Byte Configuration ........................................................ 11
VersatileIO
™ (V
IO) Control ..................................................... 11
Requirements for Reading Array Data ................................... 11
Page Mode Read .................................................................... 11
Writing Commands/Command Sequences ............................ 11
Write Buffer ............................................................................. 11
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 12
Standby Mode ........................................................................ 12
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Autoselect Mode ..................................................................... 16
Table 2. Autoselect Codes, (High Voltage Method) .......................16
Sector Group Protection and Unprotection ............................. 16
Table 3. Sector Group Protection/Unprotection Address Table ......16
Write Protect (WP#) ................................................................ 18
Temporary Sector Group Unprotect ....................................... 18
Figure 1. Temporary Sector Group Unprotect Operation................ 18
Figure 2. In-System Sector Group
Protect/Unprotect Algorithms .......................................................... 19
SecSi (Secured Silicon) Sector Flash Memory Region .......... 20
Figure 3. SecSi Sector Protect Verify.............................................. 21
Hardware Data Protection ...................................................... 21
Low VCC Write Inhibit ............................................................ 21
Write Pulse “Glitch” Protection ............................................... 21
Logical Inhibit .......................................................................... 21
Power-Up Write Inhibit ............................................................ 21
Common Flash Memory Interface (CFI) . . . . . . . 21
CFI Query Identification String ........................................................ 22
System Interface String................................................................... 22
Table 6. Device Geometry Definition .............................................. 23
Table 7. Primary Vendor-Specific Extended Query ........................ 24
Command Definitions . . . . . . . . . . . . . . . . . . . . . 24
Reading Array Data ................................................................ 24
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 25
Word/Byte Program Command Sequence ............................. 25
Unlock Bypass Command Sequence ..................................... 26
Write Buffer Programming ...................................................... 26
Accelerated Program .............................................................. 27
Figure 4. Write Buffer Programming Operation............................... 28
Figure 5. Program Operation .......................................................... 29
Program Suspend/Program Resume Command Sequence ... 29
Figure 6. Program Suspend/Program Resume............................... 30
Chip Erase Command Sequence ........................................... 30
Sector Erase Command Sequence ........................................ 30
Figure 7. Erase Operation............................................................... 31
Erase Suspend/Erase Resume Commands ........................... 32
Command Definitions ............................................................. 33
Command Definitions (x16 Mode, BYTE# = V
IH) ............................ 33
Command Definitions (x8 Mode, BYTE# = V
IL)............................... 34
Write Operation Status . . . . . . . . . . . . . . . . . . . . 35
DQ7: Data# Polling ................................................................. 35
Figure 8. Data# Polling Algorithm .................................................. 36
RY/BY#: Ready/Busy# ............................................................ 37
DQ6: Toggle Bit I .................................................................... 37
Figure 9. Toggle Bit Algorithm........................................................ 38
DQ2: Toggle Bit II ................................................................... 38
Reading Toggle Bits DQ6/DQ2 ............................................... 39
DQ5: Exceeded Timing Limits ................................................ 39
DQ3: Sector Erase Timer ....................................................... 39
DQ1: Write-to-Buffer Abort ..................................................... 39
Table 10. Write Operation Status ................................................... 40
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 41
Figure 10. Maximum Negative Overshoot Waveform .................... 41
Figure 11. Maximum Positive
Overshoot Waveform ..................................................................... 41
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 41
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 42
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 12. Test Setup..................................................................... 43
Table 1. Test Specifications ........................................................... 43
Key to Switching Waveforms. . . . . . . . . . . . . . . . 43
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 43
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 44
Read-Only Operations ........................................................... 44
Figure 14. Read Operation Timings ............................................... 44
Figure 15. Page Read Timings ...................................................... 45
Hardware Reset (RESET#) .................................................... 46
Figure 16. Reset Timings ............................................................... 46
Erase and Program Operations .............................................. 47
Figure 17. Program Operation Timings.......................................... 48
Figure 18. Accelerated Program Timing Diagram.......................... 48
Figure 19. Chip/Sector Erase Operation Timings .......................... 49
Figure 20. Data# Polling Timings
(During Embedded Algorithms)...................................................... 50
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 51
Figure 22. DQ2 vs. DQ6................................................................. 51
Temporary Sector Unprotect .................................................. 52
Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 52
Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 53
Alternate CE# Controlled Erase and Program Operations ..... 54
Figure 25. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 55
Erase And Programming Performance . . . . . . . 56
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 56
TSOP Pin and BGA Package Capacitance . . . . . 56
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 57
TS056/TSR056—56-Pin Standard and Reverse Pinout
Thin Small Outline Package (TSOP) ...................................... 57
LAA064—64-Ball Fortified Ball Grid Array (FBGA) 13 x 11 mm
Package .................................................................................. 58
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 59


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