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IP4776CZ38 Fiches technique(PDF) 6 Page - NXP Semiconductors |
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IP4776CZ38 Fiches technique(HTML) 6 Page - NXP Semiconductors |
6 / 13 page IP4776CZ38_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 18 September 2006 6 of 13 Philips Semiconductors IP4776CZ38 Fully integrated HDMI interface with level shifter [1] Signal pins: TMDS_D2+, TMDS_D2 −, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−, TMDS_CLK+, TMDS_CLK −, CEC_OUT, DDC_DAT_OUT, DDC_CLK_OUT, HOT_PLUG_DET_OUT. [2] This parameter is guaranteed by design. [3] This measurement is performed with a 0.1 µF external capacitor on pin TMDS_BIAS. [4] For level shifting N-FET. ∆C ch(TMDS) TMDS channel capacitance difference VCC(5V0) = 5 V; f = 1 MHz; Vbias = 2.5 V [2] - 0.05 - pF Cch(mutual) mutual channel capacitance between signal pin and pin n.c.; VCC(5V0) = 0 V; f = 1 MHz; Vbias = 2.5 V [2] - 0.07 - pF CI(ch-GND)(levsh) level shifting input capacitance from channel to ground VCC(5V0) = 0 V; f = 1 MHz; Vbias = 2.5 V [2] - 46pF Rdyn dynamic resistance I = 1 A; IEC 61000-4-5/9 positive transient - 2.4 - Ω negative transient - 1.3 - Ω VCL(ch)trt(pos) positive transient channel clamping voltage VESD =8kV [3] -8 -V ∆V on on-state voltage drop VCC(3V3) = 2.5 V; VS = GND; IDS =3mA [4] - 85 140 mV Table 5. Characteristics …continued Tamb =25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit |
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