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SN74CB3T1G125 Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74CB3T1G125 Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 12 page SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5V/3.3V LOW VOLTAGE BUS SWITCH WITH 5V TOLERANT LEVEL SHIFTER SCDS150 − OCTOBER 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Output Voltage Translation Tracks VCC D Supports Mixed-Mode Signal Operation On All Data I/O Ports − 5-V Input Down To 3.3-V Output Level Shift With 3.3-V VCC − 5-V/3.3-V Input Down To 2.5-V Output Level Shift With 2.5-V VCC D 5-V Tolerant I/Os With Device Powered-Up or Powered-Down D Bidirectional Data Flow, With Near-Zero Propagation Delay D Low ON-State Resistance (ron) Characteristics (ron = 5 Ω Typical) D Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 5 pF Typical) D Data and Control Inputs Provide Undershoot Clamp Diodes D Low Power Consumption (ICC = 20 µA Max) D VCC Operating Range From 2.3 V to 3.6 V D Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V) D Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 1000-V Charged-Device Model (C101) D Supports Digital Applications: Level Translation, USB Interface, Bus Isolation D Ideal for Low-Power Portable Equipment DBV OR DCK PACKAGE (TOP VIEW) 1 2 3 5 4 OE A GND VCC B description/ordering information The SN74CB3T1G125 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T1G125 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1). The SN74CB3T1G125 is a 1-bit bus switch with a single ouput-enable (OE) input. When OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the bus switch is OFF, and a high-impedance state exists between the A and B ports. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ −40 °C to 85°C SOT (SOT-23) − DBV Tape and reel SN74CB3T1G125DBVR W25_ −40 °C to 85°C SOT (SC-70) − DCK Tape and reel SN74CB3T1G125DCKR WM_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ The actual top-side marking has one additional character that designates the assembly/test site. Copyright 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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