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ADV7324 Fiches technique(PDF) 10 Page - Analog Devices |
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ADV7324 Fiches technique(HTML) 10 Page - Analog Devices |
10 / 92 page ADV7324 Rev. 0 | Page 10 of 92 t9 t11 CLKIN_A C9–C0 t10 t12 P_HSYNC, P_VSYNC, P_BLANK CONTROL INPUTS G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 B4 B5 R0 R1 R2 R3 R4 R5 Y9–Y0 t14 CONTROL OUTPUTS t13 t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME S9–S0 Figure 5. HD RGB 4:4:4 Input Mode (Input Mode 010) t9 t11 t10 t12 t11 t12 t13 t14 CLKIN_B* *CLKIN_B MUST BE USED IN THIS PS MODE Y9–Y0 t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME CONTROL INPUTS CONTROL OUTPUTS Yxxx Crxxx Y1 Cr0 Y0 Cb0 P_HSYNC, P_VSYNC, P_BLANK Figure 6. PS 4:2:2 10-Bit Interleaved at 27 MHz HSYNC/VSYNC Input Mode (Input Mode 100) t9 t11 t10 t12 t14 t13 CLKIN_A Y9–Y0 t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME CONTROL INPUTS CONTROL OUTPUTS Yxxx Crxxx Y1 Cr0 Y0 Cb0 P_VSYNC, P_HSYNC, P_BLANK Figure 7. PS 4:2:2 10-Bit Interleaved at 54 MHz HSYNC /VSYNC Input Mode (Input Mode 111) |
Numéro de pièce similaire - ADV7324 |
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Description similaire - ADV7324 |
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