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74LVCH32373A Fiches technique(PDF) 10 Page - NXP Semiconductors

No de pièce 74LVCH32373A
Description  32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state
Download  16 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVCH32373A Fiches technique(HTML) 10 Page - NXP Semiconductors

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1999 Nov 24
10
Philips Semiconductors
Product specification
32-bit transparent D-type latch with
5 V tolerant inputs/outputs; 3-state
74LVCH32373A
Fig.7 3-state output enable and disable times.
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5 × VCC at VCC < 2.7 V;
VX =VOL + 0.3 V at VCC ≥ 2.7 V;
VX =VOL + 0.1 V at VCC < 2.7 V;
VY =VOH − 0.3VatVCC ≥ 2.7 V;
VY =VOH − 0.1VatVCC < 2.7 V;
VOL and VOH are typical output voltage drop that occur with the output load.
handbook, full pagewidth
MNA478
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Fig.8 Load circuitry for switching times.
Definitions for test circuit:
RL = load resistor.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance
Zo of the pulse generator.
VCC
VI
<2.7 V
VCC
2.7 to 3.6 V
2.7 V
handbook, full pagewidth
open
GND
50 pF
2
× VCC
VCC
VI
VO
MNA479
D.U.T.
CL
RL
RT
500
RL
500
PULSE
GENERATOR
S1
TEST
S1
tPLH/tPHL
open
tPLZ/tPZL
2
× VCC
tPHZ/tPZH
GND


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