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74LVC841A Datasheet(Fiches technique) 6 Page - NXP Semiconductors

Numéro de pièce 74LVC841A
Description  10-bit transparent latch with 5-volt tolerant inputs/outputs 3-State
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
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Philips Semiconductors
Product specification
74LVC841A
10-bit transparent latch with 5-volt tolerant
inputs/outputs (3-State)
1998 Jun 17
6
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V
VM = 0.5 V × VCC at VCC < 2.7 V
VM = 1.5 V at VCC = 3.0 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX = VOL + 0.1 × VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC ≥ 2.7 V
VY = VOH – 0.1 × VCC at VCC < 2.7 V
SV01727
Dn Input
Qn Output
tPLH
tPHL
VM
VM
VI
GND
VOL
VOH
Figure 1. Input (Dn) to output (Qn) propagation delays.
SV01729
VM
LE INPUT
VI
GND
VOL
VOH
Qn OUTPUT
VM
t PLH
t PHL
tW
Figure 2. Latch enable input (LE) pulse width, the latch enable
input to output (Qn) propagation delays.
SV01728
outputs
disabled
outputs
enabled
outputs
enabled
tPHZ
tPZH
tPZL
tPLZ
VX
VY
VM
VM
VM
OE INPUT
Qn OUTPUT
LOW-to-OFF
OFF-to-LOW
Qn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VOL
GND
GND
VOH
VCC
VI
Figure 3. 3-State enable and disable times.
SV01730
VM
Dn INPUT
LE INPUT
GND
VI
VI
GND
VM
tsu
t su
th
th
Figure 4. Data set-up and hold times for the
Dn input to LE input.
Note to Figure 4: The shaded areas indicate when the input is
permitted to change for predictable output performance
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
D.U.T.
VO
CL
50pF
S1
2 x VCC
Open
GND
500
500
VCC
VI
t 2.7V
VCC
2.7V – 3.6V
2.7V
Test
S1
GND
tPLZ/tPZL
2 x VCC
tPHZ/tPZH
tPLH/tPHL
Open
SY00003
VCC
Figure 5. Load circuitry for switching times.




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