Moteur de recherche de fiches techniques de composants électroniques |
|
74HCT4316DB Fiches technique(PDF) 2 Page - NXP Semiconductors |
|
74HCT4316DB Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 15 page September 1993 2 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 FEATURES • Low “ON” resistance: 160 Ω (typ.) at VCC − VEE = 4.5 V 120 Ω (typ.) at VCC − VEE = 6.0 V 80 Ω (typ.) at VCC − VEE = 9.0 V • Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals • Typical “break before make” built in • Output capability: non-standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT4316 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4316 have four independent analog switches. Each switch has two input/output terminals (nY, nZ) and an active HIGH select input (nS). When the enable input (E) is HIGH, all four analog switches are turned off. Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC >> (VY, VZ) >> VEE. Inputs nY and nZ are electrically equivalent terminals. VCC and GND are the supply voltage pins for the digital control inputs (E and nS). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (nY and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC − VEE may not exceed 10.0 V. See the “4016” for the version without logic level translation. QUICK REFERENCE DATA VEE = GND = 0 V; Tamb =25 °C; tr =tf = 6 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPZH turn “ON” time CL = 15 pF; RL =1 kΩ; VCC =5 V E to VOS 19 19 ns nS to VOS 16 17 ns tPZL turn “ON” time E to VOS 19 24 ns nS to VOS 16 21 ns tPHZ/ tPLZ turn “OFF” time E to VOS 20 21 ns nS to VOS 16 19 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per switch notes 1 and 2 13 14 pF CS max. switch capacitance 5 5 pF Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD =CPD × VCC2 × fi +∑ {(CL + CS) × VCC2 × fo } where: fi = input frequency in MHz fo = output frequency in MHz ∑ {(CL + CS) × VCC2 × fo } = sum of outputs CL = output load capacitance in pF CS = max. switch capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V |
Numéro de pièce similaire - 74HCT4316DB |
|
Description similaire - 74HCT4316DB |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |