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ZL40511 Fiches technique(PDF) 5 Page - Zarlink Semiconductor Inc

No de pièce ZL40511
Description  Dual Output DVD and CD 4 Channel Laser Diode Drivers
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Fabricant  ZARLINK [Zarlink Semiconductor Inc]
Site Internet  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL40511 Fiches technique(HTML) 5 Page - Zarlink Semiconductor Inc

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ZL40511/15
Data Sheet
5
Zarlink Semiconductor Inc.
1.0
Application Notes
1.1
Read and Write Channel Operation
The read channel is activated by applying a 'High' signal to the PWR_UP pin. In this mode, the fast write channels
can be enabled by applying a 'Low' signal to the respective write enable pins (/EN2), (/EN3) or (/EN4). The output
currents of the four channels are summed together and output as a composite signal at either OUTA (if SELA select
is 'High') or OUTB (if SELA select is 'Low'). This provides the ability to drive two different laser diodes with just one
ZL40511/15.
Voltage control of the channel reference inputs (INR, IN2, IN3 and IN4) can be achieved quite easily using an
external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input
current, Iin:
where Rin is the input impedance of the respective reference channel.
1.2
On-chip RF Oscillator
An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the appropriate current
output (OUTA, if SELA select is 'High', or OUTB, if SELA select is 'Low'). The oscillator amplitude is set by an
external resistor from RSA or RSB to GND. Its frequency is set by an external resistor RFA or RFB to GND. RSA
and RFA are selected when SELA is ‘High’.
The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The
oscillator signal has zero DC level and +1_pt to –1_pt signal swing. Consequently, if the programmed DC level from
the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined signal will be
clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce
the pk to pk amplitude output.
1.3
Thermal Considerations
Package thermal resistance is 40
°C/W under the EIA/JESD51-3 compliant PCB test board condition.
Users should ensure that the junction temperature does not exceed 150
°C. Thermal resistance from junction to
case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on
any heat extraction arrangements.
Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient
calculations undertaken to ensure that the junction temperature never exceeds 150
°C.
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