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GS81032AQ-138I Fiches technique(PDF) 7 Page - GSI Technology

No de pièce GS81032AQ-138I
Description  32K x 32 1M Synchronous Burst SRAM
Download  23 Pages
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Fabricant  GSI [GSI Technology]
Site Internet  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS81032AQ-138I Fiches technique(HTML) 7 Page - GSI Technology

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Rev: 1.01 7/2001
7/23
© 2000, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS81032AT/Q-150/138/133/117/100/66
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
Simplified State Diagram
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1, E2, E3) and Write (BA, BB, BC, BD, BW, and GW) control
inputs, and that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.


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