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GS8321EV32E-225I Fiches technique(PDF) 10 Page - GSI Technology

No de pièce GS8321EV32E-225I
Description  2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
Download  33 Pages
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Fabricant  GSI [GSI Technology]
Site Internet  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8321EV32E-225I Fiches technique(HTML) 10 Page - GSI Technology

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First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
WR
R
WR
X
X
X
CR
R
CW
CR
CR
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1) and Write (BA, BB, BC, BD, BW, and GW) control inputs, and
that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
GS8321EV18/32/36E-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 4/2005
10/33
© 2003, GSI Technology
Simplified State Diagram


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