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AP1086 Fiches technique(PDF) 4 Page - Anachip Corp

No de pièce AP1086
Description  1.5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
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Fabricant  ANACHIP [Anachip Corp]
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AP1086 Fiches technique(HTML) 4 Page - Anachip Corp

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1.5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
AP1086
Anachip Corp.
www.anachip.com.tw
Rev.1.3 Jun. 8, 2005
4/9
Functional Description
Introduction
The AP1086 adjustable or fixed-mode Low Dropout
(LDO) regulator is a 3 terminal device which can
easily be programmed by internal mask change to
any voltages within the range of 1.25V to Vin-1.4V.
The AP1086 only needs 1.4V differential between
Vin and Vout to maintain output regulation. In
addition, the output voltage tolerances are also
extremely tight and they include the transient
response as part of the specification. For example,
Intel VRE specification calls for a total of +/- 100mV
including initial tolerance, load regulation and 0 to
1.5A load step.
The AP1086 is specifically designed to meet the
fast current transient needs as well as providing an
accurate initial voltage, reducing the overall system
cost with the need for fewer output capacitors.
Load Regulation
Since the AP1086 is only a 3 terminal device, it is
not possible to provide true remote sensing of the
output voltage at the load. But it can supply good
load regulation by internal feedback bypass the
external loss such as adjustable mode.
Stability
The AP1086 requires the use of an output capacitor
as part of the frequency compensation in order to
make the regulator stable. For most applications a
minimum of 10uF aluminum electrolytic capacitor
insures both stability and good transient response.
Thermal Design
The AP1086 incorporates an internal thermal
shutdown that protects the device when the junction
temperature exceeds the maximum allowable
junction temperature. Although this device can
operate with junction temperatures in the range of
150
oC, it is recommended that the selected heat
sink be chosen such that during maximum
continuous load operation the junction temperature
is kept below the temperature.
Layout Consideration
The output capacitors must be located as close to
the Vout terminal of the device as possible. It is
recommended to use a section of a layer of the PC
board as a plane to connect the Vout pin to the
output capacitors to prevent any high frequency
oscillation that may result due to excessive trace
inductance.


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