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LD3522PGK-011 Fiches technique(PDF) 2 Page - PerkinElmer Optoelectronics

No de pièce LD3522PGK-011
Description  Low-Cost Digital Linescan Camera
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Fabricant  PERKINELMER [PerkinElmer Optoelectronics]
Site Internet  http://www.perkinelmer.com
Logo PERKINELMER - PerkinElmer Optoelectronics

LD3522PGK-011 Fiches technique(HTML) 2 Page - PerkinElmer Optoelectronics

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Figure1a: Spectral Sensitivity Curve (1X Gain)
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Wavelength (nm)
Right Scale
Left Scale
Figure 1b: Window Transmission Curve
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Digital Linescan Camera
Sensor Description
The LD3500-series cameras contain a
single output, high-performance, high-
resolution line scan image sensor
(PerkinElmer Optoelectronics Reticon
®
parts RL0512PAG, RL1024PAG, or
RL2048PAG) featuring a pinned
photodiode pixel. The spectral
response of the sensor is shown in
Figure 1a, with the sensor window
transmission curve shown in Figure 1b.
Functional Description
The video signal from the sensor is
processed through a single channel of
sampled-and-held, raster order, digital
video data. The video channel signal
processing circuitry offers adjustable gain
levels that allow users to customize of
the camera to unique lighting
applications
Operating Modes
The LD3500 series cameras can operate
in Master or Slave Mode. When the
camera is set to Master Mode, the camera
operates at its maximum line scan and
data rate. When the camera is set to
Slave Mode, the cameras scan and data
rates are determined by the users input
signals to the camera. The opertaing
mode is set via the serial connection on
the CameraLink models, and is auto-
detected on the LVDS models. Auto-
detection is accomplished by looking for
either a Line Transfer (LT) and/or
External Clock signal. If the camera
receives a LT signal, but no external
clock, it will continue to run a the
maximum data rate, but will only intiate
a LT upon signal. If the camera recieves
an external clock signal, it will run at
that clock signal with either an internal
or external LT signal.
Input/Output Signal
Specifications
The LD3500 camera requires a single
DC supply (+12 to 24V) for operation.
An internal oscillator sets the default
data output rate to default model rate
(20 or 40 MHz).
CameraLink Models:
CameraLink allows for 4
manufacturer-defined camera control
signals (CC1-CC4). CC1 is a Line
Transfer (LT) signal. CC2 is a Line
Reset (LR) signal. CC3 and CC4 are
reserved for future assignment.
The rising edge of the LT signal
transfers the charge from each
photosite to the readout registers.
The readout registers, in turn,
transport the charge from each
photosite in succession to the video
outputs. The exposure time of the
camera can be externally controlled
using the LR input. The LR input is
active low (ON) in polarity and
therefore, when not in use, must be
held high or left unattended (OFF).
In this condition, the exposure time is
defined by the period of the LT signal.
Output signals are compliant with
CameraLink specifications.
Parallel LVDS (RS-644) Models:
Parallel LVDS models of the LD3500
provide Master Clock (MCLK), Line
Transfer (LT) and Line Reset (LR)
input signals. The MCLK input
determines the data rate frequency for
values up to maximum clock of the
camera. The MCLK input is optional,
as the camera is preset to run off of
the internal oscillator at the default
maximum data rate.
Should a data rate slower than that
default rate be necessary, an
externally supplied master clock can
be used. The data rate may be run
from 2 MHz to cameras maximum
clock rate. The Line Transfer input
signal transfers the charge from each
photosite to the readout registers.
The readout registers, in turn,
transport the charge from each
photosite in succession to the video
outputs.
The exposure time of a LD3500-series
camera can be controlled by using the
external LR input. The LR input is
active low (ON) in polarity and
therefore, when not in use, must be
held high or left unattended (OFF).
In this condition, the exposure time
is defined by the period of the LT
signal. When using the LR input
signal, the exposure period is defined
to be the time between the rising edge
of LT to the rising edge of LR.
The LD3500-series camera provides
two output synchronization signals:
Camera Clock (CCLK) and Line
PDP-206.01B - 7/2002W Page 2


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