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SI3220PPTX-EVB Fiches technique(PDF) 7 Page - Silicon Laboratories |
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SI3220PPTX-EVB Fiches technique(HTML) 7 Page - Silicon Laboratories |
7 / 112 page Si3220/25 Rev. 1.2 7 Chipset Power Consumption PSLEEP Sleep mode, RESET = 0, VBAT = –70 V —8— mW POPEN Open (high-impedance), VBAT =–70 V — 69 — mW PSTBY Active on-hook standby, VBAT = –70 V — 89 — mW PACTIVE3 Forward/reverse active off-hook, ABIAS = 4 mA, VBAT = –24 V — 267 — mW POHT Forward/reverse OHT, OBIAS = 4 mA, VBAT = –70 V — 757 — mW PRING Ringing, VRING =45vrms, VBAT = –70 V, 1 REN load2 — 541 — mW Table 3. 3.3 V Power Supply Characteristics1 (Continued) (VDD, VDD1 – VDD4 = 3.3 V, TA = 0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. All specifications are for a single channel based on measurements with both channels in the same operating state. 2. See "3.14.4. Ringing Power Considerations" on page 53 for current and power consumption under other operating conditions. 3. Power consumption does not include additional power required for dc loop feed. Total system power consumption must include an additional (VDD + |VBAT|) x ILOOP term. |
Numéro de pièce similaire - SI3220PPTX-EVB |
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Description similaire - SI3220PPTX-EVB |
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