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MSK5900RH Fiches technique(PDF) 3 Page - M.S. Kennedy Corporation

No de pièce MSK5900RH
Description  RAD TOLERANT ULTRA LOW DROPOUT ADJUSTABLE POSITIVE LINEAR REGULATOR
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Fabricant  MSK [M.S. Kennedy Corporation]
Site Internet  http://www.mskennedy.com
Logo MSK - M.S. Kennedy Corporation

MSK5900RH Fiches technique(HTML) 3 Page - M.S. Kennedy Corporation

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APPLICATION NOTES
PIN FUNCTIONS
VIN A,B,C - These pins provide power to all internal
circuitry including bias, start-up, thermal limit and
overcurrent latch. Input voltage range is 2.8V to 7.5V.
All three pins must be connected for proper operation.
GND1 - Internally connected to input ground, these pins
should be connected externally by the user to the circuit
ground and the GND2 pins.
LATCH - The MSK 5900RH has a timed latch-off circuit
which provides overcurrent protection. An overcurrent
or output short condition will saturate the internal drive
transistor. The time-out latch will then be triggered and
turn off the regulator. The time-out period is determined
by an external capacitor connected between the latch
and GND pins. Once the overcurrent condition is removed,
the latch can be reset by pulling the SHUTDOWN pin
high, grounding the LATCH pin or cycling power off,
then on. Under normal conditions, the voltage at the
LATCH pin is zero. When the device is latched off, the
voltage at the LATCH pin will be 1.6V at 25°C.
SHUTDOWN - There are two functions to the SHUT-
DOWN pin. It may be used to disable the output voltage
or to reset the LATCH pin. To activate the shutdown/
reset functions the user must apply a voltage greater
than 1.3V to the SHUTDOWN pin. The output voltage
will turn on when the SHUTDOWN pin is pulled below
the threshold voltage. If the SHUTDOWN pin is not used,
it should be connected to ground.
FB - The FB pin is the inverting input of the internal error
amplifier. The non-inverting input is connected to an in-
ternal 1.265V reference. This error amplifier controls the
drive to the output transistor to force the FB pin to
1.265V. An external resistor divider is connected to the
output, FB pin and ground to set the output voltage.
GND2 - Internally connected to output ground, these pins
should be connected externally by the user to the circuit
ground and the GND1 pins.
VOUT A,B,C - These are the output pins for the device.
All three pins must be connected for proper operation.
To maximize transient response and minimize power
supply transients it is recommended that a 33µF
minimum tantalum capacitor is connected between VIN
and ground. A 0.1µF ceramic capacitor should also be
used for high frequency bypassing.
OUTPUT CAPACITOR SELECTION
Typically, large bulk capacitance is required at the
output of a linear regulator to maintain good load tran-
sient response. However, with the MSK 5900RH this is
not the case. A 47µF surface mount tantalum capacitor
in parallel with a 0.1µF ceramic capacitor from the out-
put to ground should suffice under most conditions. If
the user finds that tighter voltage regulation is needed
during output transients, more capacitance may be added.
If more capacitance is added to the output, the band-
width may suffer.
OVERCURRENT LATCH-OFF/LATCH PIN
CAPACITOR SELECTION
As previously mentioned, the LATCH pin provides over
current/output short circuit protection with a timed latch-
off circuit. The latch off time out is determined with an
external capacitor connected from the LATCH pin to
ground. The time-out period is equal to the time it takes
to charge this external capacitor from 0V to 1.6V. The
latch charging current is provided by an internal current
source. This current is a function of input voltage and
temperature (see latch charging current curve). For in-
stance, at 25°C, the latch charging current is 7.2µA at
VIN=3V and 8µA at VIN=7V.
In the latch-off mode, some additional current will be
drawn from the input. This additional latching current is
also a function of input voltage and temperature (see
latching current curve).
FIGURE 1
POWER SUPPLY BYPASSING
3
Rev. F
2/06
The MSK 5900RH current limit function is directly
affected by the input and output voltages. Figure 1
illustrates the relationship between VIN and ICL for three
output voltages.


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