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LMH6525 Fiches technique(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
No de pièce LMH6525
Description  Four-hannel Laser Diode Driver with Dual Output
Download  15 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMH6525 Fiches technique(HTML) 12 Page - National Semiconductor (TI)

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Application Section (Continued)
voltage of the part at the power pin is 5.25V and this means
the supply line loss is 0.25V. So at 5.5V supply voltage the
part can drive laser diodes with a forward voltage in access
of 4V.
Application Hints
SUPPLY SEQUENCING
As the LMH6525/6526 is fabricated in the CMOS7 process,
latch-up concerns are minimal. Be aware that applying a low
impedance input to the part when it has no supply voltage
will forward bias the ESD diode on the input pin and then
source power into the part’s V
DD pin. If the potential exists for
sustained operation with active inputs and no supply voltage,
all the active inputs should have series resistors to limit the
current into the input pins to levels below a few milliamperes.
DECOUPLING
The LMH6525/6526 has very high output currents changing
within a nanosecond. This makes decoupling especially im-
portant. High performance, low impedance ceramic capaci-
tors should be located as close as possible to the supply
pins. The LMH6525/6526 needs two decoupling capacitors,
one for the analog power and ground V
DDA, GNDA) and one
for the power side supply and ground (3xV
DD and GNDB).
The high level of output current dictates the power side
decoupling capacitor should be 0.1 microfarads minimum.
Larger values may improve rise times depending on the
layout and trace impedances of the connections. The capaci-
tors should have direct connection across the supply pins on
the top layer, preferably with small copper-pour planes.
These planes can connect to the bottom side ground and/or
power planes with vias but there should be a topside low
impedance path with no vias if possible. (see also Figure 4
Decoupling Capacitors).
OVERSHOOT
As the LMH6525/6526 has fast rise times of less then a
nanosecond, any inductance in the output path will cause
overshoot. This includes the inductance in the laser diode
itself as well as any trace inductance. A series connection of
a resistor and a capacitor across the laser diode could be
helpful to reduce unwanted overshoot or to reduce the very
high peaks caused by the relaxation oscillations of a laser
diode when driven from below the knee voltage. But keep
always in mind that this causes a slower rise and/ or fall time.
Typical values are 10
Ω and 100 pF. The actual values re-
quired depend on the laser diode used and the circuit layout
and should be determined empirically.
THERMAL
General
The LMH6525/6526 is a very high current output device.
This means that the device must have adequate heat-
sinking to prevent the die from reaching its absolute maxi-
mum rating of 150˚C. The primary way heat is removed from
the LMH6525/6526 is through the Die Attach Pad, the large
center pad on the bottomside of the device. Heat is also
carried out of the die through the bond wires to the traces.
The outputs and the V
DD pads of the device have double
bond wires on this device so they will conduct about twice as
much heat to the pad. In any event, the heat able to be
transferred out the bond wires is far less than that which can
be conducted out of the die attach pad. Heat can also be
removed from the top of the part but the plastic encapsula-
tion has worse thermal conductivity then copper. This means
a heat sink on top of the part is less effective than the same
copper area on the circuit board that is thermally attached to
the Die Attach Pad.
PBC Heatsinks
In order to remove the heat from the die attach pad there
must be a good thermal path to large copper pours on the
circuit board. If the part is mounted on a dual-layer board the
simplest method is to use 6 or 8 vias under the die attach
pad to connect the pad thermally (as well as electrically, of
course) to the bottomside of the circuit board. The vias can
then conduct heat to a copper pour area with a size as large
as possible. Please see application note AN-1187 for guide-
lines about these vias and LLP packaging in general. Follow
the link below to view the mentioned application note. http://
www.national.com/an/AN/AN-1187.pdf
Derating
It is essential to keep the LMH6525/6526 die under 150˚C.
This means that if there is inadequate heat sinking the part
may overheat at maximum load while at maximum operating
ambient of 85˚C. How much power (current) the part can
deliver to the load at elevated ambient temperatures is
purely dependent on the amount of heat sinking the part is
provided with.
LAYOUT
Inputs
Critical inputs are the LVDS lines. These are two coupled
lines of a certain impedance, mostly 100
Ω. For some reason
those lines could have another value but in that case the
termination resistance must have the same value. The dif-
ferential input resistance of the LMH6525 and LMH6526 is
100
Ω and normally the impedance of the incoming transmis-
sion line matches that value. When using a flexible flat cable
it is important to know the impedance of two parallel wires in
that cable. Flex cables can have different pitch distances,
but a commonly used cable has a pitch of 0.5 mm. When
verified by TDR equipment, the measurements show an
impedance of about 142
Ω. It is possible to calculate the
impedance of such a cable when some parameters are
known. Needed parameters are the pitch (a) of the wires, the
20110123
FIGURE 1. Output Configuration
www.national.com
12


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