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TPS51124RGERG4 Fiches technique(PDF) 9 Page - Texas Instruments |
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TPS51124RGERG4 Fiches technique(HTML) 9 Page - Texas Instruments |
9 / 22 page www.ti.com DETAILED DESCRIPTION (continued) OUTPUT DISCHARGE CONTROL CURRENT PROTECTION V trip (mV) ) Rtrip(kp) 10 (mA) (2) I ocl V trip R DS(on) ) I ripple 2 V trip R DS(on) ) 1 2 L ƒ V IN [ V OUT V OUT V IN (3) OVER/UNDER-VOLTAGE PROTECTION UVLO PROTECTION THERMAL SHUTDOWN TPS51124 SLVS616A – NOVEMBER 2005 – REVISED NOVEMBER 2005 TPS51124 discharges the output when ENx is low, or the controller is turned off by the protection functions (OVP, UVP, UVLO, and thermal shutdown). TPS51124 discharges outputs using an internal, 10- Ω MOSFET which is connected to VOx and PGNDx. The external low-side MOSFET is not turned on for the output discharge operation to avoid the possibility of causing negative voltage at the output. Output discharge time constant is a function of the output capacitance and the resistance of the internal discharge MOSFET. This discharge ensures that, on restart, the regulated voltage always starts from zero volts. In case a SMPS is restarted before discharge completion, discharge is terminated and the switching resumes after the reference level, ramped up by an internal DAC, comes back to the remaining output voltage. TPS51124 has cycle-by-cycle over-current limiting control. The inductor current is monitored during the OFF state and the controller keeps the OFF state during the inductor current is larger than the over-current trip level. In order to provide both good accuracy and cost effective solution, TPS51124 supports temperature compensated MOSFET RDS(on) sensing. TRIPx pin should be connected to GND through the trip voltage setting resistor, Rtrip. TRIPx terminal sources 10-µA Itrip current and the trip level is set to the OCL trip voltage Vtrip as below. The trip level should be in the range of 30 mV to 200 mV over all operational temperatures. The inductor current is monitored by the voltage between PGNDx pin and LLx pin so that LLx pin should be connected to the drain terminal of the low-side MOSFET. Itrip has 4200 ppm/ °C temperature slope to compensate the temperature dependency of the RDS(on). PGNDx is used as the positive current sensing node so that PGNDx should be connected to the source terminal of the low-side MOSFET. As the comparison is done during the OFF state, Vtrip sets the valley level of the inductor current. Thus, the load current at over-current threshold, Iocl, can be calculated as follows; In an over-current condition, the current to the load exceeds the current to the output capacitor; thus, the output voltage tends to fall off (droop). Eventually, it ends up crossing the under-voltage protection threshold and shuts down. TPS51124 monitors a resistor divided feedback voltage to detect over and under voltage. When the feedback voltage becomes higher than 115% of the target voltage, the OVP comparator output goes high and the circuit latches as the high-side MOSFET driver OFF and the low-side MOSFET driver ON. Also, the TPS51124 monitors VOx voltage directly and if it becomes greater than 5.75 V, the TPS51124 turns off the top MOSFET driver, and shuts off both drivers of the other channel. When the feedback voltage becomes lower than 70% of the target voltage, the UVP comparator output goes high and an internal UVP delay counter begins counting. After 32 µs, TPS51124 latches OFF both top and bottom MOSFET drivers, and shuts off both drivers of the other channel. This function is enabled after 1.7 times soft-start delay time, approximately 2 ms, to ensure start-up properly. TPS51124 has V5FILT under-voltage lock-out protection (UVLO). When the V5FILT voltage is lower than UVLO threshold voltage, the TPS51124 is shut off. This is non-latch protection. TPS51124 monitors its own temperature. If the temperature exceeds the threshold value (typically 160 °C), the switchers are shut off as both DRVH and DRVL at low; the output discharge function is enabled. TPS51124 is shut off. This is non-latch protection. 9 |
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