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PLL520-28-29 Fiches technique(PDF) 3 Page - PhaseLink Corporation

No de pièce PLL520-28-29
Description  Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
Download  7 Pages
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Fabricant  PLL [PhaseLink Corporation]
Site Internet  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PLL520-28-29 Fiches technique(HTML) 3 Page - PhaseLink Corporation

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PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 3
3. Voltage Control Crystal Oscillator (3.3V)
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
TVCXOSTB
From power valid
10
ms
VCXO Tuning Range
FXIN = 100 – 200MHz;
XTAL C0/C1 < 250
0V
≤ VCON ≤ 3.3V
200*
ppm
CLK output pullability
VCON=1.65V,
±1.65V
±100*
ppm
On-chip Varicaps control range
VCON = 0 to 3.3V
4 – 18*
pF
Linearity
10*
%
VCXO Tuning Characteristic
65
ppm/V
VCON input impedance
60
k
VCON modulation BW
0V
≤ VCON ≤ 3.3V, -3dB
25
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
4. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded
Outputs)
IDD
PECL/LVDS
100/80
mA
Operating Voltage
VDD
2.97
3.63
V
Output Clock Duty Cycle
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
45
45
50
50
55
55
%
Short Circuit Current
±50
mA
5. Jitter Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS
2.5
Period jitter peak-to-peak
At 155.52MHz, with capacitive decoupling
between VDD and GND.
18.5
ps
Accumulated jitter RMS
2.5
Accumulated jitter peak-to-peak
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles.
24
ps
Integrated jitter RMS at 155MHz
Integrated 12 kHz to 20 MHz
0.3
ps
6. Phase Noise Specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz
@10kHz
@100kHz
UNITS
Phase Noise relative
to carrier
155.52MHz
-75
-95
-125
-140
-145
dBc/Hz
Note: Phase Noise measured at VCON = 0V


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