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ADS5242 Datasheet(Fiches technique) 13 Page - Texas Instruments

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Numéro de pièce ADS5242
Description  4-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface
Télécharger  29 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
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ADS5242 Datasheet(HTML) 13 Page - Texas Instruments

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DEFINITION OF SPECIFICATIONS
Analog Bandwidth
Minimum Conversion Rate
Signal-to-Noise and Distortion (SINAD)
Aperture Delay
Aperture Uncertainty (Jitter)
SINAD + 10Log10
P
S
P
N
* PD
Clock Duty Cycle
Signal-to-Noise Ratio (SNR)
Differential Nonlinearity (DNL)
SNR * 10Log10
P
S
P
N
Effective Number of Bits (ENOB)
Spurious-Free Dynamic Range
ENOB +
SINAD * 1.76
6.02
Two-Tone, Third-Order Intermodulation
Integral Nonlinearity (INL)
Maximum Conversion Rate
ADS5242
SBAS330C – OCTOBER 2004 – REVISED OCTOBER 2005
The analog input frequency at which the spectral
This is the minimum sampling rate where the ADC
power of the fundamental frequency (as determined
still works.
by FFT analysis) is reduced by 3dB.
SINAD is the ratio of the power of the fundamental
The delay in time between the rising edge of the input
(PS) to the power of all the other spectral components
sampling clock and the actual time at which the
including noise (PN) and distortion (PD), but not
sampling occurs.
including DC.
The sample-to-sample variation in aperture delay.
SINAD is either given in units of dBc (dB to carrier)
when the absolute power of the fundamental is used
as the reference, or dBFS (dB to full-scale) when the
power of the fundamental is extrapolated to the
Pulse width high is the minimum amount of time that
full-scale range of the converter.
the ADCLK pulse should be left in logic ‘1’ state to
achieve rated performance. Pulse width low is the
minimum time that the ADCLK pulse should be left in
a low state (logic ‘0’). At a given clock rate, these
SNR is the ratio of the power of the fundamental (PS)
specifications define an acceptable clock duty cycle.
to the noise floor power (PN), excluding the power at
DC and the first eight harmonics.
An ideal ADC exhibits code transitions that are
exactly 1 LSB apart. DNL is the deviation of any
single LSB transition at the digital output from an
SNR is either given in units of dBc (dB to carrier)
ideal 1 LSB step at the analog input. If a device
when the absolute power of the fundamental is used
claims to have no missing codes, it means that all
as the reference, or dBFS (dB to full-scale) when the
possible codes (for a 12-bit converter, 4096 codes)
power of the fundamental is extrapolated to the
are present over the full operating range.
full-scale range of the converter.
The ENOB is a measure of converter performance as
The ratio of the power of the fundamental to the
compared
to
the
theoretical
limit
based
on
highest other spectral component (either spur or
quantization noise.
harmonic). SFDR is typically given in units of dBc (dB
to carrier).
Distortion
Two-tone
IMD3
is
the
ratio
of
power
of
the
INL is the deviation of the transfer function from a
fundamental (at frequencies f1 and f2) to the power of
reference line measured in fractions of 1 LSB using a
the
worst
spectral
component
of
third-order
best straight line or best fit determined by a least
intermodulation distortion at either frequency 2f1 – f2
square curve fit. INL is independent from effects of
or 2f2 – f1. IMD3 is either given in units of dBc (dB to
offset, gain or quantization errors.
carrier) when the absolute power of the fundamental
is used as the reference, or dBFS (dB to full-scale)
when the power of the fundamental is extrapolated to
The encode rate at which parametric testing is
the full-scale range of the converter.
performed. This is the maximum sampling rate where
certified operation is given.
13


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