KM68V257E datasheet(4/8 Pages) SAMSUNG

No de pièce	KM68V257E

Description	32Kx8 Bit High-Speed CMOS Static RAM (3.3V Operating)

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Fabricant	SAMSUNG [Samsung semiconductor]

Site Internet	http://www.samsung.com/Products/Semiconductor

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KM68V257E/EL, KM68V257EI/ELI

CMOS SRAM

Revision 0.0

- 4 -

August 1998

TEST CONDITIONS

NOTE : The above test conditions are also applied at industrial temperature range.

Parameter

Value

Input Pulse Levels

0V to 3V

Input Rise and Fall Times

3ns

Input and Output timing Reference Levels

1.5V

Output Loads

See below

AC CHARACTERISTICS(TA=0 to 70

°C, VCC=3.3±0.3V, unless otherwise noted.)

Output Loads(B)

DOUT

5pF*

319

Ω

353

Ω

for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ

+3.3V

* Including Scope and Jig Capacitance

Output Loads(A)

DOUT

RL = 50

Ω

ZO = 50

Ω

VL = 1.5V

30pF*

* Capacitive Load consists of all components of the

test environment.

READ CYCLE

NOTE : The above parameters are also guaranteed at industrial temperature range

.

Parameter

Symbol

KM68V257E-12

KM68V257E-15

KM68V257E-20

Unit

Min

Max

Min

Max

Min

Max

Read Cycle Time

tRC

12

-

15

-

20

-

ns

Address Access Time

tAA

-

12

-

15

-

20

ns

Chip Select to Output

tCO

-

12

-

15

-

20

ns

Output Enable to Valid Output

tOE

-

6

-

7

-

8

ns

Chip Enable to Low-Z Output

tLZ

3

-

3

-

3

-

ns

Output Enable to Low-Z Output

tOLZ

0

-

0

-

0

-

ns

Chip Disable to High-Z Output

tHZ

0

6

0

7

0

8

ns

Output Disable to High-Z Output

tOHZ

0

6

0

7

0

8

ns

Output Hold from Address Change

tOH

3

-

3

-

3

-

ns

Chip Selection to Power Up Time

tPU

0

-

0

-

0

-

ns

Chip Selection to Power DownTime

tPD

-

12

-

15

-

20

ns

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