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HD6413002 Fiches technique(PDF) 9 Page - Renesas Technology Corp |
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HD6413002 Fiches technique(HTML) 9 Page - Renesas Technology Corp |
9 / 700 page 8.4.1 Overview......................................................................................................... 201 8.4.2 I/O Mode......................................................................................................... 203 8.4.3 Idle Mode........................................................................................................ 205 8.4.4 Repeat Mode ................................................................................................... 208 8.4.5 Normal Mode.................................................................................................. 211 8.4.6 Block Transfer Mode ...................................................................................... 214 8.4.7 DMAC Activation .......................................................................................... 219 8.4.8 DMAC Bus Cycle........................................................................................... 221 8.4.9 Multiple-Channel Operation ........................................................................... 227 8.4.10 External Bus Requests, Refresh Controller, and DMAC................................ 229 8.4.11 NMI Interrupts and DMAC ............................................................................ 230 8.4.12 Aborting a DMA Transfer .............................................................................. 231 8.4.13 Exiting Full Address Mode............................................................................. 232 8.4.14 DMAC States in Reset State, Standby Modes, and Sleep Mode.................... 233 8.5 Interrupts ........................................................................................................................ 234 8.6 Usage Notes .................................................................................................................... 235 8.6.1 Note on Word Data Transfer........................................................................... 235 8.6.2 DMAC Self-Access ........................................................................................ 235 8.6.3 Longword Access to Memory Address Registers .......................................... 235 8.6.4 Note on Full Address Mode Setup.................................................................. 235 8.6.5 Note on Activating DMAC by Internal Interrupts.......................................... 236 8.6.6 NMI Interrupts and Block Transfer Mode ...................................................... 237 8.6.7 Memory and I/O Address Register Values ..................................................... 238 8.6.8 Bus Cycle when Transfer is Aborted .............................................................. 238 Section 9 I/O Ports....................................................................................................... 239 9.1 Overview ........................................................................................................................ 239 9.2 Port 4 ........................................................................................................................ 242 9.2.1 Overview......................................................................................................... 242 9.2.2 Register Descriptions...................................................................................... 243 9.2.3 Pin Functions in Each Mode........................................................................... 245 9.2.4 Input Pull-Up Transistors................................................................................ 246 9.3 Port 6 ........................................................................................................................ 247 9.3.1 Overview......................................................................................................... 247 9.3.2 Register Descriptions...................................................................................... 247 9.3.3 Pin Functions .................................................................................................. 249 9.4 Port 7 ........................................................................................................................ 249 9.4.1 Overview......................................................................................................... 249 9.4.2 Register Description ....................................................................................... 250 |
Numéro de pièce similaire - HD6413002 |
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Description similaire - HD6413002 |
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