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MMG3005NT1 Fiches technique(PDF) 3 Page - Freescale Semiconductor, Inc |
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MMG3005NT1 Fiches technique(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 20 page MMG3005NT1 3 RF Device Data Freescale Semiconductor Table 5. Functional Pin Description Name Pin Number Description RFin 3, 4 RF input for the power amplifier. This pin is DC-coupled and requires a DC-blocking series capacitor. RFOUT/ VCC 10, 11, 12 RF output for the power amplifier. This pin is DC-coupled and requires a DC-blocking series capacitor. VCC 14 Collector voltage supply. VBA 16 Bias voltage supply. GND Backside Center Metal The center metal base of the PQFN package provides both DC and RF ground as well as heat sink contact for the power amplifier. Table 6. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD 22-A114) 1A (Minimum) Machine Model (per EIA/JESD 22-A115) A (Minimum) Charge Device Model (per JESD 22-C101) IV (Minimum) Table 7. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit Per JESD 22-A113, IPC/JEDEC J-STD-020 3 260 °C Figure 1. Pin Connections (Top View) 1 VBA VCC RFout RFout RFout RFin RFin 13 59 212 311 410 16 15 14 67 8 |
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