MT90866 datasheet(74/86 Pages) ZARLINK

No de pièce	MT90866

Description	Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch

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Fabricant	ZARLINK [Zarlink Semiconductor Inc]

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MT90866

Data Sheet

74

Zarlink Semiconductor Inc.

† Characteristics are over recommended operating conditions unless otherwise stated.

‡ Typical figures are at 25

°C and are for design aid only: not guaranteed and not subject to production testing.

Note 1:

No jitter presented on input reference clock.

Figure 34 - Local Clock Timing Diagram when ST_CKo0/1 frequency = 8.192 MHz

AC Electrical Characteristics† - Local Frame Pulse and Clock Timing,

ST_CKo0 = 8.192 MHz

Characteristic

Sym.

Min.

Typ.‡

Max.

Units

Notes

1

Local Frame Boundary Offset1

tLFBOS

∆

17.5+

∆

ns

CL=30 pF

2

ST_FPo0/1 Width

tFPW8

122-

∆

122

122+

∆

ns

3

ST_FPo0/1 Output Delay from Falling edge

of ST_FPo0/1 to falling edge of ST_CKo0/1

tFODF8

61-

∆/2

61+

∆/2

ns

4

ST_FPo0/1 Output Delay from Falling edge

of ST_CKo0-1 to rising edge of ST_FPo0/1

tFODR8

61-

∆/2

61+

∆/2

ns

5

ST_CKo0/1 Clock Period

tCP8

122-

∆

122

122+

∆

ns

6

ST_CKo0/1 Clock Pulse Width High

tCh8

61-

∆/2

61+

∆/2

ns

7

ST_CKo0/1 Clock Pulse Width Low

tCL8

61-

∆/2

61+

∆/2

ns

8

ST_CKo0/1 Clock Rise/Fall Time

trC8o,

tfC8o

14

ns

tFPW8

tFODR8

tFODF8

tCH8

tCL8

tCP8

tfC8o

trC8o

tLFBOS

Backplane Frame Boundary

ST_FPo0/1

ST_CKo0/1

(8.192 MHz)

Local Output Frame Boundary

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