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TPS745-Q1 Fiches technique(PDF) 36 Page - Texas Instruments |
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TPS745-Q1 Fiches technique(HTML) 36 Page - Texas Instruments |
36 / 45 page NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. EXAMPLE BOARD LAYOUT 4225036/A 06/2019 www.ti.com VSON - 1 mm max height DRB0008J PLASTIC QUAD FLAT PACK- NO LEAD SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X SOLDER MASK DETAILS NON- SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED 0.07 MAX ALL AROUND EXPOSED METAL METAL SOLDER MASK OPENING 0.07 MIN ALL AROUND EXPOSED METAL SOLDER MASK OPENING METAL (1.65) (2.4) (2.8) (0.95) (0.575) 8X (0.6) 8X (0.31) 6X (0.65) (1.95) 1 9 4 5 8 (R0.05) TYP (Ø 0.2) VIA TYP 36 TPS745-Q1 SBVS355A – JUNE 2019 – REVISED OCTOBER 2019 www.ti.com Product Folder Links: TPS745-Q1 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated |
Numéro de pièce similaire - TPS745-Q1_V06 |
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Description similaire - TPS745-Q1_V06 |
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